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Issue 1372083002: Subzero. Eliminates the use of Variable64On32 as operands in ARM. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Removes Variable64On32 Operands. Created 5 years, 2 months ago
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1 ; This tries to be a comprehensive test of f32 and f64 convert operations. 1 ; This tries to be a comprehensive test of f32 and f64 convert operations.
2 ; The CHECK lines are only checking for basic instruction patterns 2 ; The CHECK lines are only checking for basic instruction patterns
3 ; that should be present regardless of the optimization level, so 3 ; that should be present regardless of the optimization level, so
4 ; there are no special OPTM1 match lines. 4 ; there are no special OPTM1 match lines.
5 5
6 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s 6 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s
7 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s 7 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s
8 8
9 ; RUN: %if --need=allow_dump --need=target_ARM32 --command %p2i --filetype=asm \ 9 ; RUN: %if --need=allow_dump --need=target_ARM32 --command %p2i --filetype=asm \
10 ; RUN: --target arm32 -i %s --args -O2 --skip-unimplemented \ 10 ; RUN: --target arm32 -i %s --args -O2 --skip-unimplemented \
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586 define internal double @int64BitcastToDoubleConst() { 586 define internal double @int64BitcastToDoubleConst() {
587 entry: 587 entry:
588 %conv = bitcast i64 9035768 to double 588 %conv = bitcast i64 9035768 to double
589 ret double %conv 589 ret double %conv
590 } 590 }
591 ; CHECK-LABEL: int64BitcastToDoubleConst 591 ; CHECK-LABEL: int64BitcastToDoubleConst
592 ; CHECK: mov 592 ; CHECK: mov
593 ; ARM32-LABEL: int64BitcastToDoubleConst 593 ; ARM32-LABEL: int64BitcastToDoubleConst
594 ; ARM32-DAG: movw [[REG0:r[0-9]+]], #57336 594 ; ARM32-DAG: movw [[REG0:r[0-9]+]], #57336
595 ; ARM32-DAG: movt [[REG0]], #137 595 ; ARM32-DAG: movt [[REG0]], #137
596 ; ARM32-DAG: movw [[REG1:r[0-9]+]], #0 596 ; ARM32-DAG: mov [[REG1:r[0-9]+]], #0
597 ; ARM32-DAG: vmov d{{[0-9]+}}, [[REG0]], [[REG1]] 597 ; ARM32-DAG: vmov d{{[0-9]+}}, [[REG0]], [[REG1]]
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