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Side by Side Diff: src/IceInstARM32.cpp

Issue 1372083002: Subzero. Eliminates the use of Variable64On32 as operands in ARM. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Removes Variable64On32 Operands. Created 5 years, 2 months ago
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1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 362 matching lines...) Expand 10 before | Expand all | Expand 10 after
373 addSource(Src1); 373 addSource(Src1);
374 } 374 }
375 375
376 InstARM32Vcvt::InstARM32Vcvt(Cfg *Func, Variable *Dest, Variable *Src, 376 InstARM32Vcvt::InstARM32Vcvt(Cfg *Func, Variable *Dest, Variable *Src,
377 VcvtVariant Variant, CondARM32::Cond Predicate) 377 VcvtVariant Variant, CondARM32::Cond Predicate)
378 : InstARM32Pred(Func, InstARM32::Vcvt, 1, Dest, Predicate), 378 : InstARM32Pred(Func, InstARM32::Vcvt, 1, Dest, Predicate),
379 Variant(Variant) { 379 Variant(Variant) {
380 addSource(Src); 380 addSource(Src);
381 } 381 }
382 382
383 InstARM32Mov::InstARM32Mov(Cfg *Func, Variable *Dest, Operand *Src,
384 CondARM32::Cond Predicate)
385 : InstARM32Pred(Func, InstARM32::Mov, 2, Dest, Predicate) {
386 auto *Dest64 = llvm::dyn_cast<Variable64On32>(Dest);
387 auto *Src64 = llvm::dyn_cast<Variable64On32>(Src);
388
389 assert(Dest64 == nullptr || Src64 == nullptr);
390
391 if (Dest64 != nullptr) {
392 // this-> is needed below because there is a parameter named Dest.
393 this->Dest = Dest64->getLo();
394 DestHi = Dest64->getHi();
395 }
396
397 if (Src64 == nullptr) {
398 addSource(Src);
399 } else {
400 addSource(Src64->getLo());
401 addSource(Src64->getHi());
402 }
403 }
404
383 InstARM32Vcmp::InstARM32Vcmp(Cfg *Func, Variable *Src0, Variable *Src1, 405 InstARM32Vcmp::InstARM32Vcmp(Cfg *Func, Variable *Src0, Variable *Src1,
384 CondARM32::Cond Predicate) 406 CondARM32::Cond Predicate)
385 : InstARM32Pred(Func, InstARM32::Vcmp, 2, nullptr, Predicate) { 407 : InstARM32Pred(Func, InstARM32::Vcmp, 2, nullptr, Predicate) {
386 addSource(Src0); 408 addSource(Src0);
387 addSource(Src1); 409 addSource(Src1);
388 } 410 }
389 411
390 InstARM32Vmrs::InstARM32Vmrs(Cfg *Func, CondARM32::Cond Predicate) 412 InstARM32Vmrs::InstARM32Vmrs(Cfg *Func, CondARM32::Cond Predicate)
391 : InstARM32Pred(Func, InstARM32::Vmrs, 0, nullptr, Predicate) {} 413 : InstARM32Pred(Func, InstARM32::Vmrs, 0, nullptr, Predicate) {}
392 414
(...skipping 51 matching lines...) Expand 10 before | Expand all | Expand 10 after
444 return; 466 return;
445 Ostream &Str = Func->getContext()->getStrDump(); 467 Ostream &Str = Func->getContext()->getStrDump();
446 Str << "[ARM32] "; 468 Str << "[ARM32] ";
447 Inst::dump(Func); 469 Inst::dump(Func);
448 } 470 }
449 471
450 void InstARM32Mov::emitMultiDestSingleSource(const Cfg *Func) const { 472 void InstARM32Mov::emitMultiDestSingleSource(const Cfg *Func) const {
451 if (!BuildDefs::dump()) 473 if (!BuildDefs::dump())
452 return; 474 return;
453 Ostream &Str = Func->getContext()->getStrEmit(); 475 Ostream &Str = Func->getContext()->getStrEmit();
454 auto *Dest = llvm::cast<Variable64On32>(getDest()); 476 Variable *DestLo = getDest();
455 Operand *Src = getSrc(0); 477 Variable *DestHi = getDestHi();
478 auto *Src = llvm::cast<Variable>(getSrc(0));
456 479
457 assert(Dest->getType() == IceType_i64); 480 assert(DestHi->hasReg());
458 assert(Dest->getHi()->hasReg()); 481 assert(DestLo->hasReg());
459 assert(Dest->getLo()->hasReg()); 482 assert(llvm::isa<Variable>(Src) && Src->hasReg());
460 assert(!llvm::isa<OperandARM32Mem>(Src));
461 483
462 Str << "\t" 484 Str << "\t"
463 << "vmov" << getPredicate() << "\t"; 485 << "vmov" << getPredicate() << "\t";
464 Dest->getLo()->emit(Func); 486 DestLo->emit(Func);
465 Str << ", "; 487 Str << ", ";
466 Dest->getHi()->emit(Func); 488 DestHi->emit(Func);
467 Str << ", "; 489 Str << ", ";
468 Src->emit(Func); 490 Src->emit(Func);
469 } 491 }
470 492
471 void InstARM32Mov::emitSingleDestMultiSource(const Cfg *Func) const { 493 void InstARM32Mov::emitSingleDestMultiSource(const Cfg *Func) const {
472 if (!BuildDefs::dump()) 494 if (!BuildDefs::dump())
473 return; 495 return;
474 Ostream &Str = Func->getContext()->getStrEmit(); 496 Ostream &Str = Func->getContext()->getStrEmit();
475 Variable *Dest = getDest(); 497 Variable *Dest = getDest();
476 auto *Src = llvm::cast<Variable64On32>(getSrc(0)); 498 Variable *SrcLo = llvm::cast<Variable>(getSrc(0));
499 Variable *SrcHi = llvm::cast<Variable>(getSrc(1));
477 500
478 assert(Src->getType() == IceType_i64); 501 assert(SrcHi->hasReg());
479 assert(Src->getHi()->hasReg()); 502 assert(SrcLo->hasReg());
480 assert(Src->getLo()->hasReg());
481 assert(Dest->hasReg()); 503 assert(Dest->hasReg());
482 504
483 Str << "\t" 505 Str << "\t"
484 << "vmov" << getPredicate() << "\t"; 506 << "vmov" << getPredicate() << "\t";
485 Dest->emit(Func); 507 Dest->emit(Func);
486 Str << ", "; 508 Str << ", ";
487 Src->getLo()->emit(Func); 509 SrcLo->emit(Func);
488 Str << ", "; 510 Str << ", ";
489 Src->getHi()->emit(Func); 511 SrcHi->emit(Func);
490 } 512 }
491 513
492 namespace { 514 namespace {
493 515
494 bool isVariableWithoutRegister(const Operand *Op) { 516 bool isVariableWithoutRegister(const Operand *Op) {
495 if (const auto *OpV = llvm::dyn_cast<const Variable>(Op)) { 517 if (const auto *OpV = llvm::dyn_cast<const Variable>(Op)) {
496 return !OpV->hasReg(); 518 return !OpV->hasReg();
497 } 519 }
498 return false; 520 return false;
499 } 521 }
(...skipping 76 matching lines...) Expand 10 before | Expand all | Expand 10 after
576 598
577 void InstARM32Mov::emitIAS(const Cfg *Func) const { 599 void InstARM32Mov::emitIAS(const Cfg *Func) const {
578 assert(getSrcSize() == 1); 600 assert(getSrcSize() == 1);
579 (void)Func; 601 (void)Func;
580 llvm_unreachable("Not yet implemented"); 602 llvm_unreachable("Not yet implemented");
581 } 603 }
582 604
583 void InstARM32Mov::dump(const Cfg *Func) const { 605 void InstARM32Mov::dump(const Cfg *Func) const {
584 if (!BuildDefs::dump()) 606 if (!BuildDefs::dump())
585 return; 607 return;
586 assert(getSrcSize() == 1); 608 assert(getSrcSize() == 1 || getSrcSize() == 2);
587 Ostream &Str = Func->getContext()->getStrDump(); 609 Ostream &Str = Func->getContext()->getStrDump();
588 Variable *Dest = getDest(); 610 Variable *Dest = getDest();
589 if (auto *Dest64 = llvm::dyn_cast<Variable64On32>(Dest)) { 611 Variable *DestHi = getDestHi();
590 Dest64->getLo()->dump(Func); 612 Dest->dump(Func);
613 if (DestHi) {
591 Str << ", "; 614 Str << ", ";
592 Dest64->getHi()->dump(Func); 615 DestHi->dump(Func);
593 } else {
594 Dest->dump(Func);
595 } 616 }
596 617
597 dumpOpcodePred(Str, " = mov", getDest()->getType()); 618 dumpOpcodePred(Str, " = mov", getDest()->getType());
598 Str << " "; 619 Str << " ";
599 620
600 Operand *Src = getSrc(0); 621 dumpSources(Func);
601 if (auto *Src64 = llvm::dyn_cast<Variable64On32>(Src)) {
602 Src64->getLo()->dump(Func);
603 Str << ", ";
604 Src64->getHi()->dump(Func);
605 } else {
606 Src->dump(Func);
607 }
608 } 622 }
609 623
610 void InstARM32Br::emit(const Cfg *Func) const { 624 void InstARM32Br::emit(const Cfg *Func) const {
611 if (!BuildDefs::dump()) 625 if (!BuildDefs::dump())
612 return; 626 return;
613 Ostream &Str = Func->getContext()->getStrEmit(); 627 Ostream &Str = Func->getContext()->getStrEmit();
614 Str << "\t" 628 Str << "\t"
615 << "b" << getPredicate() << "\t"; 629 << "b" << getPredicate() << "\t";
616 if (Label) { 630 if (Label) {
617 Str << Label->getName(Func); 631 Str << Label->getName(Func);
(...skipping 661 matching lines...) Expand 10 before | Expand all | Expand 10 after
1279 if (getShiftOp() != kNoShift) { 1293 if (getShiftOp() != kNoShift) {
1280 Str << ", " << InstARM32ShiftAttributes[getShiftOp()].EmitString << " "; 1294 Str << ", " << InstARM32ShiftAttributes[getShiftOp()].EmitString << " ";
1281 if (Func) 1295 if (Func)
1282 getShiftAmt()->dump(Func); 1296 getShiftAmt()->dump(Func);
1283 else 1297 else
1284 getShiftAmt()->dump(Str); 1298 getShiftAmt()->dump(Str);
1285 } 1299 }
1286 } 1300 }
1287 1301
1288 } // end of namespace Ice 1302 } // end of namespace Ice
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