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Issue 1370303004: Distinction between FeedbackVectorICSlot and FeedbackVectorSlot eliminated. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fixed release builds Created 5 years, 2 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #if V8_TARGET_ARCH_PPC 5 #if V8_TARGET_ARCH_PPC
6 6
7 #include "src/codegen.h" 7 #include "src/codegen.h"
8 #include "src/ic/ic.h" 8 #include "src/ic/ic.h"
9 #include "src/ic/ic-compiler.h" 9 #include "src/ic/ic-compiler.h"
10 #include "src/ic/stub-cache.h" 10 #include "src/ic/stub-cache.h"
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435 435
436 436
437 // The handlers in the stub cache expect a vector and slot. Since we won't 437 // The handlers in the stub cache expect a vector and slot. Since we won't
438 // change the IC from any downstream misses, a dummy vector can be used. 438 // change the IC from any downstream misses, a dummy vector can be used.
439 Register vector = LoadWithVectorDescriptor::VectorRegister(); 439 Register vector = LoadWithVectorDescriptor::VectorRegister();
440 Register slot = LoadWithVectorDescriptor::SlotRegister(); 440 Register slot = LoadWithVectorDescriptor::SlotRegister();
441 DCHECK(!AreAliased(vector, slot, r7, r8, r9, r10)); 441 DCHECK(!AreAliased(vector, slot, r7, r8, r9, r10));
442 Handle<TypeFeedbackVector> dummy_vector = 442 Handle<TypeFeedbackVector> dummy_vector =
443 TypeFeedbackVector::DummyVector(masm->isolate()); 443 TypeFeedbackVector::DummyVector(masm->isolate());
444 int slot_index = dummy_vector->GetIndex( 444 int slot_index = dummy_vector->GetIndex(
445 FeedbackVectorICSlot(TypeFeedbackVector::kDummyKeyedLoadICSlot)); 445 FeedbackVectorSlot(TypeFeedbackVector::kDummyKeyedLoadICSlot));
446 __ LoadRoot(vector, Heap::kDummyVectorRootIndex); 446 __ LoadRoot(vector, Heap::kDummyVectorRootIndex);
447 __ LoadSmiLiteral(slot, Smi::FromInt(slot_index)); 447 __ LoadSmiLiteral(slot, Smi::FromInt(slot_index));
448 448
449 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( 449 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
450 Code::ComputeHandlerFlags(Code::LOAD_IC)); 450 Code::ComputeHandlerFlags(Code::LOAD_IC));
451 masm->isolate()->stub_cache()->GenerateProbe(masm, Code::KEYED_LOAD_IC, flags, 451 masm->isolate()->stub_cache()->GenerateProbe(masm, Code::KEYED_LOAD_IC, flags,
452 receiver, key, r7, r8, r9, r10); 452 receiver, key, r7, r8, r9, r10);
453 // Cache miss. 453 // Cache miss.
454 GenerateMiss(masm); 454 GenerateMiss(masm);
455 455
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708 708
709 if (FLAG_vector_stores) { 709 if (FLAG_vector_stores) {
710 // The handlers in the stub cache expect a vector and slot. Since we won't 710 // The handlers in the stub cache expect a vector and slot. Since we won't
711 // change the IC from any downstream misses, a dummy vector can be used. 711 // change the IC from any downstream misses, a dummy vector can be used.
712 Register vector = VectorStoreICDescriptor::VectorRegister(); 712 Register vector = VectorStoreICDescriptor::VectorRegister();
713 Register slot = VectorStoreICDescriptor::SlotRegister(); 713 Register slot = VectorStoreICDescriptor::SlotRegister();
714 DCHECK(!AreAliased(vector, slot, r8, r9, r10, r11)); 714 DCHECK(!AreAliased(vector, slot, r8, r9, r10, r11));
715 Handle<TypeFeedbackVector> dummy_vector = 715 Handle<TypeFeedbackVector> dummy_vector =
716 TypeFeedbackVector::DummyVector(masm->isolate()); 716 TypeFeedbackVector::DummyVector(masm->isolate());
717 int slot_index = dummy_vector->GetIndex( 717 int slot_index = dummy_vector->GetIndex(
718 FeedbackVectorICSlot(TypeFeedbackVector::kDummyKeyedStoreICSlot)); 718 FeedbackVectorSlot(TypeFeedbackVector::kDummyKeyedStoreICSlot));
719 __ LoadRoot(vector, Heap::kDummyVectorRootIndex); 719 __ LoadRoot(vector, Heap::kDummyVectorRootIndex);
720 __ LoadSmiLiteral(slot, Smi::FromInt(slot_index)); 720 __ LoadSmiLiteral(slot, Smi::FromInt(slot_index));
721 } 721 }
722 722
723 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( 723 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
724 Code::ComputeHandlerFlags(Code::STORE_IC)); 724 Code::ComputeHandlerFlags(Code::STORE_IC));
725 masm->isolate()->stub_cache()->GenerateProbe(masm, Code::STORE_IC, flags, 725 masm->isolate()->stub_cache()->GenerateProbe(masm, Code::STORE_IC, flags,
726 receiver, key, r8, r9, r10, r11); 726 receiver, key, r8, r9, r10, r11);
727 // Cache miss. 727 // Cache miss.
728 __ b(&miss); 728 __ b(&miss);
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921 patcher.EmitCondition(ne); 921 patcher.EmitCondition(ne);
922 } else { 922 } else {
923 DCHECK(Assembler::GetCondition(branch_instr) == ne); 923 DCHECK(Assembler::GetCondition(branch_instr) == ne);
924 patcher.EmitCondition(eq); 924 patcher.EmitCondition(eq);
925 } 925 }
926 } 926 }
927 } // namespace internal 927 } // namespace internal
928 } // namespace v8 928 } // namespace v8
929 929
930 #endif // V8_TARGET_ARCH_PPC 930 #endif // V8_TARGET_ARCH_PPC
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