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Issue 1370303004: Distinction between FeedbackVectorICSlot and FeedbackVectorSlot eliminated. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fixed release builds Created 5 years, 2 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #if V8_TARGET_ARCH_MIPS64 5 #if V8_TARGET_ARCH_MIPS64
6 6
7 #include "src/codegen.h" 7 #include "src/codegen.h"
8 #include "src/ic/ic.h" 8 #include "src/ic/ic.h"
9 #include "src/ic/ic-compiler.h" 9 #include "src/ic/ic-compiler.h"
10 #include "src/ic/stub-cache.h" 10 #include "src/ic/stub-cache.h"
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426 __ Branch(&probe_dictionary, eq, a4, Operand(at)); 426 __ Branch(&probe_dictionary, eq, a4, Operand(at));
427 427
428 // The handlers in the stub cache expect a vector and slot. Since we won't 428 // The handlers in the stub cache expect a vector and slot. Since we won't
429 // change the IC from any downstream misses, a dummy vector can be used. 429 // change the IC from any downstream misses, a dummy vector can be used.
430 Register vector = LoadWithVectorDescriptor::VectorRegister(); 430 Register vector = LoadWithVectorDescriptor::VectorRegister();
431 Register slot = LoadWithVectorDescriptor::SlotRegister(); 431 Register slot = LoadWithVectorDescriptor::SlotRegister();
432 DCHECK(!AreAliased(vector, slot, a4, a5, a6, t1)); 432 DCHECK(!AreAliased(vector, slot, a4, a5, a6, t1));
433 Handle<TypeFeedbackVector> dummy_vector = 433 Handle<TypeFeedbackVector> dummy_vector =
434 TypeFeedbackVector::DummyVector(masm->isolate()); 434 TypeFeedbackVector::DummyVector(masm->isolate());
435 int slot_index = dummy_vector->GetIndex( 435 int slot_index = dummy_vector->GetIndex(
436 FeedbackVectorICSlot(TypeFeedbackVector::kDummyKeyedLoadICSlot)); 436 FeedbackVectorSlot(TypeFeedbackVector::kDummyKeyedLoadICSlot));
437 __ LoadRoot(vector, Heap::kDummyVectorRootIndex); 437 __ LoadRoot(vector, Heap::kDummyVectorRootIndex);
438 __ li(slot, Operand(Smi::FromInt(slot_index))); 438 __ li(slot, Operand(Smi::FromInt(slot_index)));
439 439
440 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( 440 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
441 Code::ComputeHandlerFlags(Code::LOAD_IC)); 441 Code::ComputeHandlerFlags(Code::LOAD_IC));
442 masm->isolate()->stub_cache()->GenerateProbe(masm, Code::LOAD_IC, flags, 442 masm->isolate()->stub_cache()->GenerateProbe(masm, Code::LOAD_IC, flags,
443 receiver, key, a4, a5, a6, t1); 443 receiver, key, a4, a5, a6, t1);
444 // Cache miss. 444 // Cache miss.
445 GenerateMiss(masm); 445 GenerateMiss(masm);
446 446
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677 if (FLAG_vector_stores) { 677 if (FLAG_vector_stores) {
678 // The handlers in the stub cache expect a vector and slot. Since we won't 678 // The handlers in the stub cache expect a vector and slot. Since we won't
679 // change the IC from any downstream misses, a dummy vector can be used. 679 // change the IC from any downstream misses, a dummy vector can be used.
680 Register vector = VectorStoreICDescriptor::VectorRegister(); 680 Register vector = VectorStoreICDescriptor::VectorRegister();
681 Register slot = VectorStoreICDescriptor::SlotRegister(); 681 Register slot = VectorStoreICDescriptor::SlotRegister();
682 682
683 DCHECK(!AreAliased(vector, slot, a5, a6, a7, t0)); 683 DCHECK(!AreAliased(vector, slot, a5, a6, a7, t0));
684 Handle<TypeFeedbackVector> dummy_vector = 684 Handle<TypeFeedbackVector> dummy_vector =
685 TypeFeedbackVector::DummyVector(masm->isolate()); 685 TypeFeedbackVector::DummyVector(masm->isolate());
686 int slot_index = dummy_vector->GetIndex( 686 int slot_index = dummy_vector->GetIndex(
687 FeedbackVectorICSlot(TypeFeedbackVector::kDummyKeyedStoreICSlot)); 687 FeedbackVectorSlot(TypeFeedbackVector::kDummyKeyedStoreICSlot));
688 __ LoadRoot(vector, Heap::kDummyVectorRootIndex); 688 __ LoadRoot(vector, Heap::kDummyVectorRootIndex);
689 __ li(slot, Operand(Smi::FromInt(slot_index))); 689 __ li(slot, Operand(Smi::FromInt(slot_index)));
690 } 690 }
691 691
692 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( 692 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
693 Code::ComputeHandlerFlags(Code::STORE_IC)); 693 Code::ComputeHandlerFlags(Code::STORE_IC));
694 masm->isolate()->stub_cache()->GenerateProbe(masm, Code::STORE_IC, flags, 694 masm->isolate()->stub_cache()->GenerateProbe(masm, Code::STORE_IC, flags,
695 receiver, key, a5, a6, a7, t0); 695 receiver, key, a5, a6, a7, t0);
696 // Cache miss. 696 // Cache miss.
697 __ Branch(&miss); 697 __ Branch(&miss);
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903 patcher.ChangeBranchCondition(ne); 903 patcher.ChangeBranchCondition(ne);
904 } else { 904 } else {
905 DCHECK(Assembler::IsBne(branch_instr)); 905 DCHECK(Assembler::IsBne(branch_instr));
906 patcher.ChangeBranchCondition(eq); 906 patcher.ChangeBranchCondition(eq);
907 } 907 }
908 } 908 }
909 } // namespace internal 909 } // namespace internal
910 } // namespace v8 910 } // namespace v8
911 911
912 #endif // V8_TARGET_ARCH_MIPS64 912 #endif // V8_TARGET_ARCH_MIPS64
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