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Issue 1370303004: Distinction between FeedbackVectorICSlot and FeedbackVectorSlot eliminated. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fixed release builds Created 5 years, 2 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #if V8_TARGET_ARCH_MIPS 5 #if V8_TARGET_ARCH_MIPS
6 6
7 #include "src/codegen.h" 7 #include "src/codegen.h"
8 #include "src/ic/ic.h" 8 #include "src/ic/ic.h"
9 #include "src/ic/ic-compiler.h" 9 #include "src/ic/ic-compiler.h"
10 #include "src/ic/stub-cache.h" 10 #include "src/ic/stub-cache.h"
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429 __ Branch(&probe_dictionary, eq, t0, Operand(at)); 429 __ Branch(&probe_dictionary, eq, t0, Operand(at));
430 430
431 // The handlers in the stub cache expect a vector and slot. Since we won't 431 // The handlers in the stub cache expect a vector and slot. Since we won't
432 // change the IC from any downstream misses, a dummy vector can be used. 432 // change the IC from any downstream misses, a dummy vector can be used.
433 Register vector = LoadWithVectorDescriptor::VectorRegister(); 433 Register vector = LoadWithVectorDescriptor::VectorRegister();
434 Register slot = LoadWithVectorDescriptor::SlotRegister(); 434 Register slot = LoadWithVectorDescriptor::SlotRegister();
435 DCHECK(!AreAliased(vector, slot, t0, t1, t2, t5)); 435 DCHECK(!AreAliased(vector, slot, t0, t1, t2, t5));
436 Handle<TypeFeedbackVector> dummy_vector = 436 Handle<TypeFeedbackVector> dummy_vector =
437 TypeFeedbackVector::DummyVector(masm->isolate()); 437 TypeFeedbackVector::DummyVector(masm->isolate());
438 int slot_index = dummy_vector->GetIndex( 438 int slot_index = dummy_vector->GetIndex(
439 FeedbackVectorICSlot(TypeFeedbackVector::kDummyKeyedLoadICSlot)); 439 FeedbackVectorSlot(TypeFeedbackVector::kDummyKeyedLoadICSlot));
440 __ LoadRoot(vector, Heap::kDummyVectorRootIndex); 440 __ LoadRoot(vector, Heap::kDummyVectorRootIndex);
441 __ li(slot, Operand(Smi::FromInt(slot_index))); 441 __ li(slot, Operand(Smi::FromInt(slot_index)));
442 442
443 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( 443 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
444 Code::ComputeHandlerFlags(Code::LOAD_IC)); 444 Code::ComputeHandlerFlags(Code::LOAD_IC));
445 masm->isolate()->stub_cache()->GenerateProbe(masm, Code::LOAD_IC, flags, 445 masm->isolate()->stub_cache()->GenerateProbe(masm, Code::LOAD_IC, flags,
446 receiver, key, t0, t1, t2, t5); 446 receiver, key, t0, t1, t2, t5);
447 // Cache miss. 447 // Cache miss.
448 GenerateMiss(masm); 448 GenerateMiss(masm);
449 449
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678 678
679 if (FLAG_vector_stores) { 679 if (FLAG_vector_stores) {
680 // The handlers in the stub cache expect a vector and slot. Since we won't 680 // The handlers in the stub cache expect a vector and slot. Since we won't
681 // change the IC from any downstream misses, a dummy vector can be used. 681 // change the IC from any downstream misses, a dummy vector can be used.
682 Register vector = VectorStoreICDescriptor::VectorRegister(); 682 Register vector = VectorStoreICDescriptor::VectorRegister();
683 Register slot = VectorStoreICDescriptor::SlotRegister(); 683 Register slot = VectorStoreICDescriptor::SlotRegister();
684 DCHECK(!AreAliased(vector, slot, t1, t2, t4, t5)); 684 DCHECK(!AreAliased(vector, slot, t1, t2, t4, t5));
685 Handle<TypeFeedbackVector> dummy_vector = 685 Handle<TypeFeedbackVector> dummy_vector =
686 TypeFeedbackVector::DummyVector(masm->isolate()); 686 TypeFeedbackVector::DummyVector(masm->isolate());
687 int slot_index = dummy_vector->GetIndex( 687 int slot_index = dummy_vector->GetIndex(
688 FeedbackVectorICSlot(TypeFeedbackVector::kDummyKeyedStoreICSlot)); 688 FeedbackVectorSlot(TypeFeedbackVector::kDummyKeyedStoreICSlot));
689 __ LoadRoot(vector, Heap::kDummyVectorRootIndex); 689 __ LoadRoot(vector, Heap::kDummyVectorRootIndex);
690 __ li(slot, Operand(Smi::FromInt(slot_index))); 690 __ li(slot, Operand(Smi::FromInt(slot_index)));
691 } 691 }
692 692
693 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( 693 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
694 Code::ComputeHandlerFlags(Code::STORE_IC)); 694 Code::ComputeHandlerFlags(Code::STORE_IC));
695 masm->isolate()->stub_cache()->GenerateProbe(masm, Code::STORE_IC, flags, 695 masm->isolate()->stub_cache()->GenerateProbe(masm, Code::STORE_IC, flags,
696 receiver, key, t1, t2, t4, t5); 696 receiver, key, t1, t2, t4, t5);
697 // Cache miss. 697 // Cache miss.
698 __ Branch(&miss); 698 __ Branch(&miss);
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906 patcher.ChangeBranchCondition(ne); 906 patcher.ChangeBranchCondition(ne);
907 } else { 907 } else {
908 DCHECK(Assembler::IsBne(branch_instr)); 908 DCHECK(Assembler::IsBne(branch_instr));
909 patcher.ChangeBranchCondition(eq); 909 patcher.ChangeBranchCondition(eq);
910 } 910 }
911 } 911 }
912 } // namespace internal 912 } // namespace internal
913 } // namespace v8 913 } // namespace v8
914 914
915 #endif // V8_TARGET_ARCH_MIPS 915 #endif // V8_TARGET_ARCH_MIPS
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