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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #if V8_TARGET_ARCH_ARM | 5 #if V8_TARGET_ARCH_ARM |
| 6 | 6 |
| 7 #include "src/codegen.h" | 7 #include "src/codegen.h" |
| 8 #include "src/ic/ic.h" | 8 #include "src/ic/ic.h" |
| 9 #include "src/ic/ic-compiler.h" | 9 #include "src/ic/ic-compiler.h" |
| 10 #include "src/ic/stub-cache.h" | 10 #include "src/ic/stub-cache.h" |
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| 425 __ b(eq, &probe_dictionary); | 425 __ b(eq, &probe_dictionary); |
| 426 | 426 |
| 427 // The handlers in the stub cache expect a vector and slot. Since we won't | 427 // The handlers in the stub cache expect a vector and slot. Since we won't |
| 428 // change the IC from any downstream misses, a dummy vector can be used. | 428 // change the IC from any downstream misses, a dummy vector can be used. |
| 429 Register vector = LoadWithVectorDescriptor::VectorRegister(); | 429 Register vector = LoadWithVectorDescriptor::VectorRegister(); |
| 430 Register slot = LoadWithVectorDescriptor::SlotRegister(); | 430 Register slot = LoadWithVectorDescriptor::SlotRegister(); |
| 431 DCHECK(!AreAliased(vector, slot, r4, r5, r6, r9)); | 431 DCHECK(!AreAliased(vector, slot, r4, r5, r6, r9)); |
| 432 Handle<TypeFeedbackVector> dummy_vector = | 432 Handle<TypeFeedbackVector> dummy_vector = |
| 433 TypeFeedbackVector::DummyVector(masm->isolate()); | 433 TypeFeedbackVector::DummyVector(masm->isolate()); |
| 434 int slot_index = dummy_vector->GetIndex( | 434 int slot_index = dummy_vector->GetIndex( |
| 435 FeedbackVectorICSlot(TypeFeedbackVector::kDummyKeyedLoadICSlot)); | 435 FeedbackVectorSlot(TypeFeedbackVector::kDummyKeyedLoadICSlot)); |
| 436 __ LoadRoot(vector, Heap::kDummyVectorRootIndex); | 436 __ LoadRoot(vector, Heap::kDummyVectorRootIndex); |
| 437 __ mov(slot, Operand(Smi::FromInt(slot_index))); | 437 __ mov(slot, Operand(Smi::FromInt(slot_index))); |
| 438 | 438 |
| 439 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( | 439 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( |
| 440 Code::ComputeHandlerFlags(Code::LOAD_IC)); | 440 Code::ComputeHandlerFlags(Code::LOAD_IC)); |
| 441 masm->isolate()->stub_cache()->GenerateProbe(masm, Code::KEYED_LOAD_IC, flags, | 441 masm->isolate()->stub_cache()->GenerateProbe(masm, Code::KEYED_LOAD_IC, flags, |
| 442 receiver, key, r4, r5, r6, r9); | 442 receiver, key, r4, r5, r6, r9); |
| 443 // Cache miss. | 443 // Cache miss. |
| 444 GenerateMiss(masm); | 444 GenerateMiss(masm); |
| 445 | 445 |
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| 702 if (FLAG_vector_stores) { | 702 if (FLAG_vector_stores) { |
| 703 // The handlers in the stub cache expect a vector and slot. Since we won't | 703 // The handlers in the stub cache expect a vector and slot. Since we won't |
| 704 // change the IC from any downstream misses, a dummy vector can be used. | 704 // change the IC from any downstream misses, a dummy vector can be used. |
| 705 Register vector = VectorStoreICDescriptor::VectorRegister(); | 705 Register vector = VectorStoreICDescriptor::VectorRegister(); |
| 706 Register slot = VectorStoreICDescriptor::SlotRegister(); | 706 Register slot = VectorStoreICDescriptor::SlotRegister(); |
| 707 | 707 |
| 708 DCHECK(!AreAliased(vector, slot, r5, temporary2, r6, r9)); | 708 DCHECK(!AreAliased(vector, slot, r5, temporary2, r6, r9)); |
| 709 Handle<TypeFeedbackVector> dummy_vector = | 709 Handle<TypeFeedbackVector> dummy_vector = |
| 710 TypeFeedbackVector::DummyVector(masm->isolate()); | 710 TypeFeedbackVector::DummyVector(masm->isolate()); |
| 711 int slot_index = dummy_vector->GetIndex( | 711 int slot_index = dummy_vector->GetIndex( |
| 712 FeedbackVectorICSlot(TypeFeedbackVector::kDummyKeyedStoreICSlot)); | 712 FeedbackVectorSlot(TypeFeedbackVector::kDummyKeyedStoreICSlot)); |
| 713 __ LoadRoot(vector, Heap::kDummyVectorRootIndex); | 713 __ LoadRoot(vector, Heap::kDummyVectorRootIndex); |
| 714 __ mov(slot, Operand(Smi::FromInt(slot_index))); | 714 __ mov(slot, Operand(Smi::FromInt(slot_index))); |
| 715 } | 715 } |
| 716 | 716 |
| 717 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( | 717 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( |
| 718 Code::ComputeHandlerFlags(Code::STORE_IC)); | 718 Code::ComputeHandlerFlags(Code::STORE_IC)); |
| 719 masm->isolate()->stub_cache()->GenerateProbe( | 719 masm->isolate()->stub_cache()->GenerateProbe( |
| 720 masm, Code::STORE_IC, flags, receiver, key, r5, temporary2, r6, r9); | 720 masm, Code::STORE_IC, flags, receiver, key, r5, temporary2, r6, r9); |
| 721 // Cache miss. | 721 // Cache miss. |
| 722 __ b(&miss); | 722 __ b(&miss); |
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| 911 patcher.EmitCondition(ne); | 911 patcher.EmitCondition(ne); |
| 912 } else { | 912 } else { |
| 913 DCHECK(Assembler::GetCondition(branch_instr) == ne); | 913 DCHECK(Assembler::GetCondition(branch_instr) == ne); |
| 914 patcher.EmitCondition(eq); | 914 patcher.EmitCondition(eq); |
| 915 } | 915 } |
| 916 } | 916 } |
| 917 } // namespace internal | 917 } // namespace internal |
| 918 } // namespace v8 | 918 } // namespace v8 |
| 919 | 919 |
| 920 #endif // V8_TARGET_ARCH_ARM | 920 #endif // V8_TARGET_ARCH_ARM |
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