| Index: src/IceTargetLoweringARM32.cpp
|
| diff --git a/src/IceTargetLoweringARM32.cpp b/src/IceTargetLoweringARM32.cpp
|
| index d61d93cf0430b57ff316dd2ab95ce07b48f33acf..a1c4551ba36a4df5b7932df60c06c161dd522475 100644
|
| --- a/src/IceTargetLoweringARM32.cpp
|
| +++ b/src/IceTargetLoweringARM32.cpp
|
| @@ -2110,7 +2110,7 @@ void TargetARM32::lowerCast(const InstCast *Inst) {
|
| break;
|
| }
|
| if (Src0->getType() == IceType_i64) {
|
| - // avoid cryptic liveness errors
|
| + // avoid liveness errors
|
| Context.insert(InstFakeDef::create(Func, Dest));
|
| UnimplementedError(Func->getContext()->getFlags());
|
| break;
|
| @@ -2210,7 +2210,7 @@ void TargetARM32::lowerCast(const InstCast *Inst) {
|
| UnimplementedError(Func->getContext()->getFlags());
|
| break;
|
| case IceType_v4i32:
|
| - // avoid cryptic liveness errors
|
| + // avoid liveness errors
|
| Context.insert(InstFakeDef::create(Func, Dest));
|
| UnimplementedError(Func->getContext()->getFlags());
|
| break;
|
| @@ -2287,15 +2287,17 @@ void TargetARM32::lowerFcmp(const InstFcmp *Inst) {
|
| if (CC0 != CondARM32::kNone) {
|
| _mov(T, One, CC0);
|
| // If this mov is not a maybe mov, but an actual mov (i.e., CC0 == AL), we
|
| - // don't want to set_dest_nonkillable so that liveness + dead-code
|
| + // don't want to _set_dest_redefined so that liveness + dead-code
|
| // elimination will get rid of the previous assignment (i.e., T = 0) above.
|
| + // TODO(stichnot,jpp): We should be able to conditionally create the "T=0"
|
| + // instruction based on CC0, instead of relying on DCE to remove it.
|
| if (CC0 != CondARM32::AL)
|
| - _set_dest_nonkillable();
|
| + _set_dest_redefined();
|
| }
|
| if (CC1 != CondARM32::kNone) {
|
| assert(CC0 != CondARM32::kNone);
|
| assert(CC1 != CondARM32::AL);
|
| - _mov_nonkillable(T, One, CC1);
|
| + _mov_redefined(T, One, CC1);
|
| }
|
| _mov(Dest, T);
|
| }
|
| @@ -2371,7 +2373,7 @@ void TargetARM32::lowerIcmp(const InstIcmp *Inst) {
|
| _cmp(Src0Lo, Src1LoRF, CondARM32::EQ);
|
| }
|
| _mov(T, One, TableIcmp64[Index].C1);
|
| - _mov_nonkillable(T, Zero, TableIcmp64[Index].C2);
|
| + _mov_redefined(T, Zero, TableIcmp64[Index].C2);
|
| _mov(Dest, T);
|
| return;
|
| }
|
| @@ -2427,7 +2429,7 @@ void TargetARM32::lowerIcmp(const InstIcmp *Inst) {
|
| Operand *Src1RF = legalize(Src1, Legal_Reg | Legal_Flex);
|
| _cmp(Src0R, Src1RF);
|
| }
|
| - _mov_nonkillable(T, One, getIcmp32Mapping(Inst->getCondition()));
|
| + _mov_redefined(T, One, getIcmp32Mapping(Inst->getCondition()));
|
| _mov(Dest, T);
|
| return;
|
| }
|
| @@ -2640,7 +2642,7 @@ void TargetARM32::lowerIntrinsicCall(const InstIntrinsicCall *Instr) {
|
| case Intrinsics::Stackrestore: {
|
| Variable *SP = getPhysicalRegister(RegARM32::Reg_sp);
|
| Operand *Val = legalize(Instr->getArg(0), Legal_Reg | Legal_Flex);
|
| - _mov_nonkillable(SP, Val);
|
| + _mov_redefined(SP, Val);
|
| return;
|
| }
|
| case Intrinsics::Trap:
|
| @@ -2670,9 +2672,9 @@ void TargetARM32::lowerCLZ(Variable *Dest, Variable *ValLoR, Variable *ValHiR) {
|
| _add(T2, T, ThirtyTwo);
|
| _clz(T2, ValHiR, CondARM32::NE);
|
| // T2 is actually a source as well when the predicate is not AL (since it
|
| - // may leave T2 alone). We use set_dest_nonkillable to prolong the liveness
|
| + // may leave T2 alone). We use _set_dest_redefined to prolong the liveness
|
| // of T2 as if it was used as a source.
|
| - _set_dest_nonkillable();
|
| + _set_dest_redefined();
|
| _mov(DestLo, T2);
|
| Variable *T3 = nullptr;
|
| _mov(T3, Zero);
|
| @@ -2776,7 +2778,7 @@ void TargetARM32::lowerSelect(const InstSelect *Inst) {
|
| Operand *SrcFLo = legalize(loOperand(SrcF), Legal_Reg | Legal_Flex);
|
| _mov(TLo, SrcFLo);
|
| Operand *SrcTLo = legalize(loOperand(SrcT), Legal_Reg | Legal_Flex);
|
| - _mov_nonkillable(TLo, SrcTLo, Cond);
|
| + _mov_redefined(TLo, SrcTLo, Cond);
|
| _mov(DestLo, TLo);
|
| // Set the high portion.
|
| Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest));
|
| @@ -2784,7 +2786,7 @@ void TargetARM32::lowerSelect(const InstSelect *Inst) {
|
| Operand *SrcFHi = legalize(hiOperand(SrcF), Legal_Reg | Legal_Flex);
|
| _mov(THi, SrcFHi);
|
| Operand *SrcTHi = legalize(hiOperand(SrcT), Legal_Reg | Legal_Flex);
|
| - _mov_nonkillable(THi, SrcTHi, Cond);
|
| + _mov_redefined(THi, SrcTHi, Cond);
|
| _mov(DestHi, THi);
|
| return;
|
| }
|
| @@ -2797,7 +2799,7 @@ void TargetARM32::lowerSelect(const InstSelect *Inst) {
|
| SrcT = legalizeToReg(SrcT);
|
| assert(DestTy == SrcT->getType());
|
| _vmov(T, SrcT, Cond);
|
| - _set_dest_nonkillable();
|
| + _set_dest_redefined();
|
| _vmov(Dest, T);
|
| return;
|
| }
|
| @@ -2806,7 +2808,7 @@ void TargetARM32::lowerSelect(const InstSelect *Inst) {
|
| SrcF = legalize(SrcF, Legal_Reg | Legal_Flex);
|
| _mov(T, SrcF);
|
| SrcT = legalize(SrcT, Legal_Reg | Legal_Flex);
|
| - _mov_nonkillable(T, SrcT, Cond);
|
| + _mov_redefined(T, SrcT, Cond);
|
| _mov(Dest, T);
|
| }
|
|
|
| @@ -3130,7 +3132,7 @@ void TargetARM32::alignRegisterPow2(Variable *Reg, uint32_t Align) {
|
| void TargetARM32::postLower() {
|
| if (Ctx->getFlags().getOptLevel() == Opt_m1)
|
| return;
|
| - inferTwoAddress();
|
| + inferRedefinition();
|
| }
|
|
|
| void TargetARM32::makeRandomRegisterPermutation(
|
|
|