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1 //===- subzero/src/IceRegAlloc.h - Linear-scan reg. allocation --*- C++ -*-===// | 1 //===- subzero/src/IceRegAlloc.h - Linear-scan reg. allocation --*- C++ -*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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34 void scan(const llvm::SmallBitVector &RegMask, bool Randomized); | 34 void scan(const llvm::SmallBitVector &RegMask, bool Randomized); |
35 void dump(Cfg *Func) const; | 35 void dump(Cfg *Func) const; |
36 | 36 |
37 // TODO(stichnot): Statically choose the size based on the target being | 37 // TODO(stichnot): Statically choose the size based on the target being |
38 // compiled. | 38 // compiled. |
39 static constexpr size_t REGS_SIZE = 32; | 39 static constexpr size_t REGS_SIZE = 32; |
40 | 40 |
41 private: | 41 private: |
42 using OrderedRanges = CfgVector<Variable *>; | 42 using OrderedRanges = CfgVector<Variable *>; |
43 using UnorderedRanges = CfgVector<Variable *>; | 43 using UnorderedRanges = CfgVector<Variable *>; |
| 44 using DefUseErrorList = llvm::SmallVector<SizeT, 10>; |
44 | 45 |
45 class IterationState { | 46 class IterationState { |
46 IterationState(const IterationState &) = delete; | 47 IterationState(const IterationState &) = delete; |
47 IterationState operator=(const IterationState &) = delete; | 48 IterationState operator=(const IterationState &) = delete; |
48 | 49 |
49 public: | 50 public: |
50 IterationState() = default; | 51 IterationState() = default; |
51 Variable *Cur = nullptr; | 52 Variable *Cur = nullptr; |
52 Variable *Prefer = nullptr; | 53 Variable *Prefer = nullptr; |
53 int32_t PreferReg = Variable::NoRegister; | 54 int32_t PreferReg = Variable::NoRegister; |
54 bool AllowOverlap = false; | 55 bool AllowOverlap = false; |
55 llvm::SmallBitVector RegMask; | 56 llvm::SmallBitVector RegMask; |
56 llvm::SmallBitVector Free; | 57 llvm::SmallBitVector Free; |
57 llvm::SmallBitVector PrecoloredUnhandledMask; // Note: only used for dumping | 58 llvm::SmallBitVector PrecoloredUnhandledMask; // Note: only used for dumping |
58 llvm::SmallVector<RegWeight, REGS_SIZE> Weights; | 59 llvm::SmallVector<RegWeight, REGS_SIZE> Weights; |
59 }; | 60 }; |
60 | 61 |
| 62 bool livenessValidateIntervals(const DefUseErrorList &DefsWithoutUses, |
| 63 const DefUseErrorList &UsesBeforeDefs, |
| 64 const CfgVector<InstNumberT> &LRBegin, |
| 65 const CfgVector<InstNumberT> &LREnd); |
61 void initForGlobal(); | 66 void initForGlobal(); |
62 void initForInfOnly(); | 67 void initForInfOnly(); |
63 /// Move an item from the From set to the To set. From[Index] is pushed onto | 68 /// Move an item from the From set to the To set. From[Index] is pushed onto |
64 /// the end of To[], then the item is efficiently removed from From[] by | 69 /// the end of To[], then the item is efficiently removed from From[] by |
65 /// effectively swapping it with the last item in From[] and then popping it | 70 /// effectively swapping it with the last item in From[] and then popping it |
66 /// from the back. As such, the caller is best off iterating over From[] in | 71 /// from the back. As such, the caller is best off iterating over From[] in |
67 /// reverse order to avoid the need for special handling of the iterator. | 72 /// reverse order to avoid the need for special handling of the iterator. |
68 void moveItem(UnorderedRanges &From, SizeT Index, UnorderedRanges &To) { | 73 void moveItem(UnorderedRanges &From, SizeT Index, UnorderedRanges &To) { |
69 To.push_back(From[Index]); | 74 To.push_back(From[Index]); |
70 From[Index] = From.back(); | 75 From[Index] = From.back(); |
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114 llvm::SmallVector<const llvm::SmallBitVector *, REGS_SIZE> RegAliases; | 119 llvm::SmallVector<const llvm::SmallBitVector *, REGS_SIZE> RegAliases; |
115 bool FindPreference = false; | 120 bool FindPreference = false; |
116 bool FindOverlap = false; | 121 bool FindOverlap = false; |
117 | 122 |
118 const bool Verbose; | 123 const bool Verbose; |
119 }; | 124 }; |
120 | 125 |
121 } // end of namespace Ice | 126 } // end of namespace Ice |
122 | 127 |
123 #endif // SUBZERO_SRC_ICEREGALLOC_H | 128 #endif // SUBZERO_SRC_ICEREGALLOC_H |
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