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1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// | 1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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269 /// If Dest=nullptr is passed in, then a new variable is created, marked as | 269 /// If Dest=nullptr is passed in, then a new variable is created, marked as |
270 /// infinite register allocation weight, and returned through the in/out Dest | 270 /// infinite register allocation weight, and returned through the in/out Dest |
271 /// argument. | 271 /// argument. |
272 void _mov(Variable *&Dest, Operand *Src0, | 272 void _mov(Variable *&Dest, Operand *Src0, |
273 CondARM32::Cond Pred = CondARM32::AL, | 273 CondARM32::Cond Pred = CondARM32::AL, |
274 int32_t RegNum = Variable::NoRegister) { | 274 int32_t RegNum = Variable::NoRegister) { |
275 if (Dest == nullptr) | 275 if (Dest == nullptr) |
276 Dest = makeReg(Src0->getType(), RegNum); | 276 Dest = makeReg(Src0->getType(), RegNum); |
277 Context.insert(InstARM32Mov::create(Func, Dest, Src0, Pred)); | 277 Context.insert(InstARM32Mov::create(Func, Dest, Src0, Pred)); |
278 } | 278 } |
279 void _mov_nonkillable(Variable *Dest, Operand *Src0, | 279 void _mov_redefined(Variable *Dest, Operand *Src0, |
280 CondARM32::Cond Pred = CondARM32::AL) { | 280 CondARM32::Cond Pred = CondARM32::AL) { |
281 Inst *NewInst = InstARM32Mov::create(Func, Dest, Src0, Pred); | 281 Inst *NewInst = InstARM32Mov::create(Func, Dest, Src0, Pred); |
282 NewInst->setDestNonKillable(); | 282 NewInst->setDestRedefined(); |
283 Context.insert(NewInst); | 283 Context.insert(NewInst); |
284 } | 284 } |
285 /// The Operand can only be a 16-bit immediate or a ConstantRelocatable (with | 285 /// The Operand can only be a 16-bit immediate or a ConstantRelocatable (with |
286 /// an upper16 relocation). | 286 /// an upper16 relocation). |
287 void _movt(Variable *Dest, Operand *Src0, | 287 void _movt(Variable *Dest, Operand *Src0, |
288 CondARM32::Cond Pred = CondARM32::AL) { | 288 CondARM32::Cond Pred = CondARM32::AL) { |
289 Context.insert(InstARM32Movt::create(Func, Dest, Src0, Pred)); | 289 Context.insert(InstARM32Movt::create(Func, Dest, Src0, Pred)); |
290 } | 290 } |
291 void _movw(Variable *Dest, Operand *Src0, | 291 void _movw(Variable *Dest, Operand *Src0, |
292 CondARM32::Cond Pred = CondARM32::AL) { | 292 CondARM32::Cond Pred = CondARM32::AL) { |
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559 | 559 |
560 private: | 560 private: |
561 ~TargetHeaderARM32() = default; | 561 ~TargetHeaderARM32() = default; |
562 | 562 |
563 TargetARM32Features CPUFeatures; | 563 TargetARM32Features CPUFeatures; |
564 }; | 564 }; |
565 | 565 |
566 } // end of namespace Ice | 566 } // end of namespace Ice |
567 | 567 |
568 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H | 568 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H |
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