VM: Initialize Instruction objects with break instructions instead of null.

runtime/vm/assembler_mips.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_ASSEMBLER_MIPS_H_
 #define VM_ASSEMBLER_MIPS_H_
 
 #ifndef VM_ASSEMBLER_H_
 #error Do not include assembler_mips.h directly; use assembler.h instead.
 #endif
@@ skipping 486 matching lines @@
   }
 
   // Branch if not equal, likely taken.
   // Delay slot executed only when branch taken.
   void bnel(Register rs, Register rt, Label* l) {
     ASSERT(!in_delay_slot_);  // Jump within a delay slot is not supported.
     EmitBranch(BNEL, rs, rt, l);
     EmitBranchDelayNop();
   }
 
+  static int32_t BreakEncoding(int32_t code) {
+    ASSERT(Utils::IsUint(20, code));
+    return SPECIAL << kOpcodeShift |
+           code << kBreakCodeShift |
+           BREAK << kFunctionShift;
+  }
+
+
   void break_(int32_t code) {
-    ASSERT(Utils::IsUint(20, code));
-    Emit(SPECIAL << kOpcodeShift |
-         code << kBreakCodeShift |
-         BREAK << kFunctionShift);
+    Emit(BreakEncoding(code));
+  }
+
+  static uword GetBreakInstructionFiller() {
+    return BreakEncoding(0);
   }
 
   // FPU compare, always false.
   void cfd(DRegister ds, DRegister dt) {
     FRegister fs = static_cast<FRegister>(ds * 2);
     FRegister ft = static_cast<FRegister>(dt * 2);
     EmitFpuRType(COP1, FMT_D, ft, fs, F0, COP1_C_F);
   }
 
   // FPU compare, true if unordered, i.e. one is NaN.
@@ skipping 1210 matching lines @@
                                   Register value,
                                   Label* no_update);
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_MIPS_H_