Index: src/IceInstX86BaseImpl.h |
diff --git a/src/IceInstX86BaseImpl.h b/src/IceInstX86BaseImpl.h |
index c6ebd3a4ad43a94193b9004364151f87545ecdb3..f2e7ff224bac2c6ee337b63e6a78e0026b94c6e8 100644 |
--- a/src/IceInstX86BaseImpl.h |
+++ b/src/IceInstX86BaseImpl.h |
@@ -1330,8 +1330,8 @@ void InstX86Imul<Machine>::emitIAS(const Cfg *Func) const { |
&InstX86Base<Machine>::Traits::Assembler::imul}; |
emitIASOpTyGPR<Machine>(Func, Ty, this->getSrc(1), Emitter); |
} else { |
- // We only use imul as a two-address instruction even though there is a 3 |
- // operand version when one of the operands is a constant. |
+ // The two-address version is used when multiplying by a non-constant |
+ // or doing an 8-bit multiply. |
assert(Var == this->getSrc(0)); |
static const typename InstX86Base< |
Machine>::Traits::Assembler::GPREmitterRegOp Emitter = { |
@@ -1343,6 +1343,43 @@ void InstX86Imul<Machine>::emitIAS(const Cfg *Func) const { |
} |
template <class Machine> |
+void InstX86ImulImm<Machine>::emit(const Cfg *Func) const { |
+ if (!BuildDefs::dump()) |
+ return; |
+ Ostream &Str = Func->getContext()->getStrEmit(); |
+ assert(this->getSrcSize() == 2); |
+ Variable *Dest = this->getDest(); |
+ assert(Dest->getType() == IceType_i16 || Dest->getType() == IceType_i32); |
+ assert(llvm::isa<Constant>(this->getSrc(1))); |
+ Str << "\timul" << this->getWidthString(Dest->getType()) << "\t"; |
+ this->getSrc(1)->emit(Func); |
+ Str << ", "; |
+ this->getSrc(0)->emit(Func); |
+ Str << ", "; |
+ Dest->emit(Func); |
+} |
+ |
+template <class Machine> |
+void InstX86ImulImm<Machine>::emitIAS(const Cfg *Func) const { |
+ assert(this->getSrcSize() == 2); |
+ const Variable *Dest = this->getDest(); |
+ Type Ty = Dest->getType(); |
+ assert(llvm::isa<Constant>(this->getSrc(1))); |
+ static const typename InstX86Base<Machine>::Traits::Assembler:: |
+ template ThreeOpImmEmitter< |
+ typename InstX86Base<Machine>::Traits::RegisterSet::GPRRegister, |
+ typename InstX86Base<Machine>::Traits::RegisterSet::GPRRegister> |
+ Emitter = {&InstX86Base<Machine>::Traits::Assembler::imul, |
+ &InstX86Base<Machine>::Traits::Assembler::imul}; |
+ emitIASThreeOpImmOps< |
+ Machine, typename InstX86Base<Machine>::Traits::RegisterSet::GPRRegister, |
+ typename InstX86Base<Machine>::Traits::RegisterSet::GPRRegister, |
+ InstX86Base<Machine>::Traits::RegisterSet::getEncodedGPR, |
+ InstX86Base<Machine>::Traits::RegisterSet::getEncodedGPR>( |
+ Func, Ty, Dest, this->getSrc(0), this->getSrc(1), Emitter); |
+} |
+ |
+template <class Machine> |
void InstX86Insertps<Machine>::emitIAS(const Cfg *Func) const { |
assert(this->getSrcSize() == 3); |
assert(static_cast<typename InstX86Base<Machine>::Traits::TargetLowering *>( |