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1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==// | 1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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1611 case InstArithmetic::Mul: | 1611 case InstArithmetic::Mul: |
1612 if (auto *C = llvm::dyn_cast<ConstantInteger32>(Src1)) { | 1612 if (auto *C = llvm::dyn_cast<ConstantInteger32>(Src1)) { |
1613 if (optimizeScalarMul(Dest, Src0, C->getValue())) | 1613 if (optimizeScalarMul(Dest, Src0, C->getValue())) |
1614 return; | 1614 return; |
1615 } | 1615 } |
1616 // The 8-bit version of imul only allows the form "imul r/m8" where T must | 1616 // The 8-bit version of imul only allows the form "imul r/m8" where T must |
1617 // be in eax. | 1617 // be in eax. |
1618 if (isByteSizedArithType(Dest->getType())) { | 1618 if (isByteSizedArithType(Dest->getType())) { |
1619 _mov(T, Src0, Traits::RegisterSet::Reg_eax); | 1619 _mov(T, Src0, Traits::RegisterSet::Reg_eax); |
1620 Src1 = legalize(Src1, Legal_Reg | Legal_Mem); | 1620 Src1 = legalize(Src1, Legal_Reg | Legal_Mem); |
| 1621 _imul(T, Src0 == Src1 ? T : Src1); |
| 1622 _mov(Dest, T); |
| 1623 } else if (auto *ImmConst = llvm::dyn_cast<ConstantInteger32>(Src1)) { |
| 1624 T = makeReg(Dest->getType()); |
| 1625 _imul_imm(T, Src0, ImmConst); |
| 1626 _mov(Dest, T); |
1621 } else { | 1627 } else { |
1622 _mov(T, Src0); | 1628 _mov(T, Src0); |
| 1629 _imul(T, Src0 == Src1 ? T : Src1); |
| 1630 _mov(Dest, T); |
1623 } | 1631 } |
1624 _imul(T, Src0 == Src1 ? T : Src1); | |
1625 _mov(Dest, T); | |
1626 break; | 1632 break; |
1627 case InstArithmetic::Shl: | 1633 case InstArithmetic::Shl: |
1628 _mov(T, Src0); | 1634 _mov(T, Src0); |
1629 if (!llvm::isa<ConstantInteger32>(Src1)) | 1635 if (!llvm::isa<ConstantInteger32>(Src1)) |
1630 Src1 = legalizeToReg(Src1, Traits::RegisterSet::Reg_ecx); | 1636 Src1 = legalizeToReg(Src1, Traits::RegisterSet::Reg_ecx); |
1631 _shl(T, Src1); | 1637 _shl(T, Src1); |
1632 _mov(Dest, T); | 1638 _mov(Dest, T); |
1633 break; | 1639 break; |
1634 case InstArithmetic::Lshr: | 1640 case InstArithmetic::Lshr: |
1635 _mov(T, Src0); | 1641 _mov(T, Src0); |
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5496 } | 5502 } |
5497 // the offset is not eligible for blinding or pooling, return the original | 5503 // the offset is not eligible for blinding or pooling, return the original |
5498 // mem operand | 5504 // mem operand |
5499 return MemOperand; | 5505 return MemOperand; |
5500 } | 5506 } |
5501 | 5507 |
5502 } // end of namespace X86Internal | 5508 } // end of namespace X86Internal |
5503 } // end of namespace Ice | 5509 } // end of namespace Ice |
5504 | 5510 |
5505 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H | 5511 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H |
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