Use three-address form of imul

src/IceTargetLoweringX86BaseImpl.h

 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 1600 matching lines @@
   case InstArithmetic::Mul:
     if (auto *C = llvm::dyn_cast<ConstantInteger32>(Src1)) {
       if (optimizeScalarMul(Dest, Src0, C->getValue()))
         return;
     }
     // The 8-bit version of imul only allows the form "imul r/m8" where T must
     // be in eax.
     if (isByteSizedArithType(Dest->getType())) {
       _mov(T, Src0, Traits::RegisterSet::Reg_eax);
       Src1 = legalize(Src1, Legal_Reg | Legal_Mem);
+      _imul(T, Src0 == Src1 ? T : Src1);
+      _mov(Dest, T);
+    } else if (auto *ImmConst = llvm::dyn_cast<ConstantInteger32>(Src1)) {
+      T = makeReg(Dest->getType());
+      _imul_imm(T, Src0, ImmConst);
+      _mov(Dest, T);
     } else {
       _mov(T, Src0);
+      _imul(T, Src0 == Src1 ? T : Src1);
+      _mov(Dest, T);
     }
-    _imul(T, Src0 == Src1 ? T : Src1);
-    _mov(Dest, T);
     break;
   case InstArithmetic::Shl:
     _mov(T, Src0);
     if (!llvm::isa<ConstantInteger32>(Src1))
       Src1 = legalizeToReg(Src1, Traits::RegisterSet::Reg_ecx);
     _shl(T, Src1);
     _mov(Dest, T);
     break;
   case InstArithmetic::Lshr:
     _mov(T, Src0);
@@ skipping 3860 matching lines @@
   }
   // the offset is not eligible for blinding or pooling, return the original
   // mem operand
   return MemOperand;
 }
 
 } // end of namespace X86Internal
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H