Use three-address form of imul

src/IceAssemblerX86BaseImpl.h

 //===- subzero/src/IceAssemblerX86BaseImpl.h - base x86 assembler -*- C++ -*-=//
 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===----------------------------------------------------------------------===//
 //
 //                        The Subzero Code Generator
@@ skipping 2563 matching lines @@
     emitOperandSizeOverride();
   emitRex(Ty, address, RexRegIrrelevant);
   if (isByteSizedArithType(Ty))
     emitUint8(0xF6);
   else
     emitUint8(0xF7);
   emitOperand(5, address);
 }
 
 template <class Machine>
+void AssemblerX86Base<Machine>::imul_imm(Type Ty,
+                                         typename Traits::GPRRegister dst,
+                                         typename Traits::GPRRegister src,
+                                         const Immediate &imm) {
+  AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  assert(Ty == IceType_i16 || Ty == IceType_i32);
+  if (Ty == IceType_i16)
+    emitOperandSizeOverride();
+  emitRexRB(Ty, dst, src);
+  if (imm.is_int8()) {
+    emitUint8(0x6B);
+    emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
+    emitUint8(imm.value() & 0xFF);
+  } else {
+    emitUint8(0x69);
+    emitRegisterOperand(gprEncoding(dst), gprEncoding(src));
+    emitImmediate(Ty, imm);
+  }
+}
+
+template <class Machine>
+void AssemblerX86Base<Machine>::imul_imm(Type Ty,
+                                         typename Traits::GPRRegister dst,
+                                         const typename Traits::Address
+                                         &address,
+                                         const Immediate &imm) {
+  AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  assert(Ty == IceType_i16 || Ty == IceType_i32);
+  if (Ty == IceType_i16)
+    emitOperandSizeOverride();
+  emitRex(Ty, address, dst);
+  if (imm.is_int8()) {
+    emitUint8(0x6B);
+    emitOperand(gprEncoding(dst), address);
+    emitUint8(imm.value() & 0xFF);
+  } else {
+    emitUint8(0x69);
+    emitOperand(gprEncoding(dst), address);
+    emitImmediate(Ty, imm);
+  }
+  emitImmediate(Ty, imm);
+}
+
+template <class Machine>
 void AssemblerX86Base<Machine>::mul(Type Ty, typename Traits::GPRRegister reg) {
   AssemblerBuffer::EnsureCapacity ensured(&Buffer);
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
   emitRexB(Ty, reg);
   if (isByteSizedArithType(Ty))
     emitUint8(0xF6);
   else
     emitUint8(0xF7);
   emitRegisterOperand(4, gprEncoding(reg));
@@ skipping 802 matching lines @@
   (void)shifter;
   if (Ty == IceType_i16)
     emitOperandSizeOverride();
   emitRexB(Ty, operand.rm());
   emitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3);
   emitOperand(rm, operand);
 }
 
 } // end of namespace X86Internal
 } // end of namespace Ice