| Index: src/arm/assembler-arm-inl.h
|
| diff --git a/src/arm/assembler-arm-inl.h b/src/arm/assembler-arm-inl.h
|
| index 0037e30ddac1b1467ce5bbc0b0cb8d6c1b03afd2..8f8956c9e1c7eb25890726abb3cfd3addeceeb54 100644
|
| --- a/src/arm/assembler-arm-inl.h
|
| +++ b/src/arm/assembler-arm-inl.h
|
| @@ -50,8 +50,50 @@
|
| bool CpuFeatures::SupportsCrankshaft() { return IsSupported(VFP3); }
|
|
|
|
|
| -int DoubleRegister::NumRegisters() {
|
| +int Register::NumAllocatableRegisters() {
|
| + return kMaxNumAllocatableRegisters;
|
| +}
|
| +
|
| +
|
| +int DwVfpRegister::NumRegisters() {
|
| return CpuFeatures::IsSupported(VFP32DREGS) ? 32 : 16;
|
| +}
|
| +
|
| +
|
| +int DwVfpRegister::NumReservedRegisters() {
|
| + return kNumReservedRegisters;
|
| +}
|
| +
|
| +
|
| +int DwVfpRegister::NumAllocatableRegisters() {
|
| + return NumRegisters() - kNumReservedRegisters;
|
| +}
|
| +
|
| +
|
| +// static
|
| +int DwVfpRegister::NumAllocatableAliasedRegisters() {
|
| + return LowDwVfpRegister::kMaxNumLowRegisters - kNumReservedRegisters;
|
| +}
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| +
|
| +
|
| +int DwVfpRegister::ToAllocationIndex(DwVfpRegister reg) {
|
| + DCHECK(!reg.is(kDoubleRegZero));
|
| + DCHECK(!reg.is(kScratchDoubleReg));
|
| + if (reg.code() > kDoubleRegZero.code()) {
|
| + return reg.code() - kNumReservedRegisters;
|
| + }
|
| + return reg.code();
|
| +}
|
| +
|
| +
|
| +DwVfpRegister DwVfpRegister::FromAllocationIndex(int index) {
|
| + DCHECK(index >= 0 && index < NumAllocatableRegisters());
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| + DCHECK(kScratchDoubleReg.code() - kDoubleRegZero.code() ==
|
| + kNumReservedRegisters - 1);
|
| + if (index >= kDoubleRegZero.code()) {
|
| + return from_code(index + kNumReservedRegisters);
|
| + }
|
| + return from_code(index);
|
| }
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|