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Side by Side Diff: src/arm64/constants-arm64.h

Issue 1365073002: Revert of Remove register index/code indirection (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 2 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_ARM64_CONSTANTS_ARM64_H_ 5 #ifndef V8_ARM64_CONSTANTS_ARM64_H_
6 #define V8_ARM64_CONSTANTS_ARM64_H_ 6 #define V8_ARM64_CONSTANTS_ARM64_H_
7 7
8 #include "src/base/macros.h" 8 #include "src/base/macros.h"
9 #include "src/globals.h" 9 #include "src/globals.h"
10 10
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111 const unsigned kDoubleWordSizeInBytes = kDoubleWordSize >> 3; 111 const unsigned kDoubleWordSizeInBytes = kDoubleWordSize >> 3;
112 const unsigned kQuadWordSize = 128; 112 const unsigned kQuadWordSize = 128;
113 const unsigned kQuadWordSizeInBytes = kQuadWordSize >> 3; 113 const unsigned kQuadWordSizeInBytes = kQuadWordSize >> 3;
114 // AArch64 floating-point specifics. These match IEEE-754. 114 // AArch64 floating-point specifics. These match IEEE-754.
115 const unsigned kDoubleMantissaBits = 52; 115 const unsigned kDoubleMantissaBits = 52;
116 const unsigned kDoubleExponentBits = 11; 116 const unsigned kDoubleExponentBits = 11;
117 const unsigned kDoubleExponentBias = 1023; 117 const unsigned kDoubleExponentBias = 1023;
118 const unsigned kFloatMantissaBits = 23; 118 const unsigned kFloatMantissaBits = 23;
119 const unsigned kFloatExponentBits = 8; 119 const unsigned kFloatExponentBits = 8;
120 120
121 #define REGISTER_CODE_LIST(R) \
122 R(0) R(1) R(2) R(3) R(4) R(5) R(6) R(7) \
123 R(8) R(9) R(10) R(11) R(12) R(13) R(14) R(15) \
124 R(16) R(17) R(18) R(19) R(20) R(21) R(22) R(23) \
125 R(24) R(25) R(26) R(27) R(28) R(29) R(30) R(31)
126
121 #define INSTRUCTION_FIELDS_LIST(V_) \ 127 #define INSTRUCTION_FIELDS_LIST(V_) \
122 /* Register fields */ \ 128 /* Register fields */ \
123 V_(Rd, 4, 0, Bits) /* Destination register. */ \ 129 V_(Rd, 4, 0, Bits) /* Destination register. */ \
124 V_(Rn, 9, 5, Bits) /* First source register. */ \ 130 V_(Rn, 9, 5, Bits) /* First source register. */ \
125 V_(Rm, 20, 16, Bits) /* Second source register. */ \ 131 V_(Rm, 20, 16, Bits) /* Second source register. */ \
126 V_(Ra, 14, 10, Bits) /* Third source register. */ \ 132 V_(Ra, 14, 10, Bits) /* Third source register. */ \
127 V_(Rt, 4, 0, Bits) /* Load dest / store source. */ \ 133 V_(Rt, 4, 0, Bits) /* Load dest / store source. */ \
128 V_(Rt2, 14, 10, Bits) /* Load second dest / */ \ 134 V_(Rt2, 14, 10, Bits) /* Load second dest / */ \
129 /* store second source. */ \ 135 /* store second source. */ \
130 V_(PrefetchMode, 4, 0, Bits) \ 136 V_(PrefetchMode, 4, 0, Bits) \
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1227 }; 1233 };
1228 1234
1229 enum UnallocatedOp { 1235 enum UnallocatedOp {
1230 UnallocatedFixed = 0x00000000, 1236 UnallocatedFixed = 0x00000000,
1231 UnallocatedFMask = 0x00000000 1237 UnallocatedFMask = 0x00000000
1232 }; 1238 };
1233 1239
1234 } } // namespace v8::internal 1240 } } // namespace v8::internal
1235 1241
1236 #endif // V8_ARM64_CONSTANTS_ARM64_H_ 1242 #endif // V8_ARM64_CONSTANTS_ARM64_H_
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