OLD | NEW |
1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // | 2 // |
3 // Redistribution and use in source and binary forms, with or without | 3 // Redistribution and use in source and binary forms, with or without |
4 // modification, are permitted provided that the following conditions are | 4 // modification, are permitted provided that the following conditions are |
5 // met: | 5 // met: |
6 // | 6 // |
7 // * Redistributions of source code must retain the above copyright | 7 // * Redistributions of source code must retain the above copyright |
8 // notice, this list of conditions and the following disclaimer. | 8 // notice, this list of conditions and the following disclaimer. |
9 // * Redistributions in binary form must reproduce the above | 9 // * Redistributions in binary form must reproduce the above |
10 // copyright notice, this list of conditions and the following | 10 // copyright notice, this list of conditions and the following |
(...skipping 17 matching lines...) Expand all Loading... |
28 | 28 |
29 #if V8_TARGET_ARCH_ARM64 | 29 #if V8_TARGET_ARCH_ARM64 |
30 | 30 |
31 #define ARM64_DEFINE_REG_STATICS | 31 #define ARM64_DEFINE_REG_STATICS |
32 #include "src/arm64/assembler-arm64.h" | 32 #include "src/arm64/assembler-arm64.h" |
33 | 33 |
34 #include "src/arm64/assembler-arm64-inl.h" | 34 #include "src/arm64/assembler-arm64-inl.h" |
35 #include "src/arm64/frames-arm64.h" | 35 #include "src/arm64/frames-arm64.h" |
36 #include "src/base/bits.h" | 36 #include "src/base/bits.h" |
37 #include "src/base/cpu.h" | 37 #include "src/base/cpu.h" |
38 #include "src/register-configuration.h" | |
39 | 38 |
40 namespace v8 { | 39 namespace v8 { |
41 namespace internal { | 40 namespace internal { |
42 | 41 |
43 | 42 |
44 // ----------------------------------------------------------------------------- | 43 // ----------------------------------------------------------------------------- |
45 // CpuFeatures implementation. | 44 // CpuFeatures implementation. |
46 | 45 |
47 void CpuFeatures::ProbeImpl(bool cross_compile) { | 46 void CpuFeatures::ProbeImpl(bool cross_compile) { |
48 // AArch64 has no configuration options, no further probing is required. | 47 // AArch64 has no configuration options, no further probing is required. |
(...skipping 137 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
186 | 185 |
187 bool RelocInfo::IsInConstantPool() { | 186 bool RelocInfo::IsInConstantPool() { |
188 Instruction* instr = reinterpret_cast<Instruction*>(pc_); | 187 Instruction* instr = reinterpret_cast<Instruction*>(pc_); |
189 return instr->IsLdrLiteralX(); | 188 return instr->IsLdrLiteralX(); |
190 } | 189 } |
191 | 190 |
192 | 191 |
193 Register GetAllocatableRegisterThatIsNotOneOf(Register reg1, Register reg2, | 192 Register GetAllocatableRegisterThatIsNotOneOf(Register reg1, Register reg2, |
194 Register reg3, Register reg4) { | 193 Register reg3, Register reg4) { |
195 CPURegList regs(reg1, reg2, reg3, reg4); | 194 CPURegList regs(reg1, reg2, reg3, reg4); |
196 const RegisterConfiguration* config = RegisterConfiguration::ArchDefault(); | 195 for (int i = 0; i < Register::NumAllocatableRegisters(); i++) { |
197 for (int i = 0; i < config->num_allocatable_double_registers(); ++i) { | 196 Register candidate = Register::FromAllocationIndex(i); |
198 int code = config->GetAllocatableDoubleCode(i); | |
199 Register candidate = Register::from_code(code); | |
200 if (regs.IncludesAliasOf(candidate)) continue; | 197 if (regs.IncludesAliasOf(candidate)) continue; |
201 return candidate; | 198 return candidate; |
202 } | 199 } |
203 UNREACHABLE(); | 200 UNREACHABLE(); |
204 return NoReg; | 201 return NoReg; |
205 } | 202 } |
206 | 203 |
207 | 204 |
208 bool AreAliased(const CPURegister& reg1, const CPURegister& reg2, | 205 bool AreAliased(const CPURegister& reg1, const CPURegister& reg2, |
209 const CPURegister& reg3, const CPURegister& reg4, | 206 const CPURegister& reg3, const CPURegister& reg4, |
(...skipping 2932 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
3142 movk(scratch, (target_offset >> 32) & 0xFFFF, 32); | 3139 movk(scratch, (target_offset >> 32) & 0xFFFF, 32); |
3143 DCHECK((target_offset >> 48) == 0); | 3140 DCHECK((target_offset >> 48) == 0); |
3144 add(rd, rd, scratch); | 3141 add(rd, rd, scratch); |
3145 } | 3142 } |
3146 | 3143 |
3147 | 3144 |
3148 } // namespace internal | 3145 } // namespace internal |
3149 } // namespace v8 | 3146 } // namespace v8 |
3150 | 3147 |
3151 #endif // V8_TARGET_ARCH_ARM64 | 3148 #endif // V8_TARGET_ARCH_ARM64 |
OLD | NEW |