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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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43 #include "src/debug/debug.h" | 43 #include "src/debug/debug.h" |
44 | 44 |
45 | 45 |
46 namespace v8 { | 46 namespace v8 { |
47 namespace internal { | 47 namespace internal { |
48 | 48 |
49 | 49 |
50 bool CpuFeatures::SupportsCrankshaft() { return IsSupported(VFP3); } | 50 bool CpuFeatures::SupportsCrankshaft() { return IsSupported(VFP3); } |
51 | 51 |
52 | 52 |
53 int DoubleRegister::NumRegisters() { | 53 int Register::NumAllocatableRegisters() { |
| 54 return kMaxNumAllocatableRegisters; |
| 55 } |
| 56 |
| 57 |
| 58 int DwVfpRegister::NumRegisters() { |
54 return CpuFeatures::IsSupported(VFP32DREGS) ? 32 : 16; | 59 return CpuFeatures::IsSupported(VFP32DREGS) ? 32 : 16; |
55 } | 60 } |
56 | 61 |
57 | 62 |
| 63 int DwVfpRegister::NumReservedRegisters() { |
| 64 return kNumReservedRegisters; |
| 65 } |
| 66 |
| 67 |
| 68 int DwVfpRegister::NumAllocatableRegisters() { |
| 69 return NumRegisters() - kNumReservedRegisters; |
| 70 } |
| 71 |
| 72 |
| 73 // static |
| 74 int DwVfpRegister::NumAllocatableAliasedRegisters() { |
| 75 return LowDwVfpRegister::kMaxNumLowRegisters - kNumReservedRegisters; |
| 76 } |
| 77 |
| 78 |
| 79 int DwVfpRegister::ToAllocationIndex(DwVfpRegister reg) { |
| 80 DCHECK(!reg.is(kDoubleRegZero)); |
| 81 DCHECK(!reg.is(kScratchDoubleReg)); |
| 82 if (reg.code() > kDoubleRegZero.code()) { |
| 83 return reg.code() - kNumReservedRegisters; |
| 84 } |
| 85 return reg.code(); |
| 86 } |
| 87 |
| 88 |
| 89 DwVfpRegister DwVfpRegister::FromAllocationIndex(int index) { |
| 90 DCHECK(index >= 0 && index < NumAllocatableRegisters()); |
| 91 DCHECK(kScratchDoubleReg.code() - kDoubleRegZero.code() == |
| 92 kNumReservedRegisters - 1); |
| 93 if (index >= kDoubleRegZero.code()) { |
| 94 return from_code(index + kNumReservedRegisters); |
| 95 } |
| 96 return from_code(index); |
| 97 } |
| 98 |
| 99 |
58 void RelocInfo::apply(intptr_t delta) { | 100 void RelocInfo::apply(intptr_t delta) { |
59 if (RelocInfo::IsInternalReference(rmode_)) { | 101 if (RelocInfo::IsInternalReference(rmode_)) { |
60 // absolute code pointer inside code object moves with the code object. | 102 // absolute code pointer inside code object moves with the code object. |
61 int32_t* p = reinterpret_cast<int32_t*>(pc_); | 103 int32_t* p = reinterpret_cast<int32_t*>(pc_); |
62 *p += delta; // relocate entry | 104 *p += delta; // relocate entry |
63 } | 105 } |
64 // We do not use pc relative addressing on ARM, so there is | 106 // We do not use pc relative addressing on ARM, so there is |
65 // nothing else to do. | 107 // nothing else to do. |
66 } | 108 } |
67 | 109 |
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620 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { | 662 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { |
621 Assembler::FlushICacheWithoutIsolate(pc, 4 * kInstrSize); | 663 Assembler::FlushICacheWithoutIsolate(pc, 4 * kInstrSize); |
622 } | 664 } |
623 } | 665 } |
624 } | 666 } |
625 | 667 |
626 | 668 |
627 } } // namespace v8::internal | 669 } } // namespace v8::internal |
628 | 670 |
629 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ | 671 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ |
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