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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
6 | 6 |
7 #if defined(TARGET_ARCH_MIPS) | 7 #if defined(TARGET_ARCH_MIPS) |
8 | 8 |
| 9 #include "vm/cpu.h" |
| 10 #include "vm/cpuinfo.h" |
| 11 #include "vm/simulator.h" |
| 12 |
9 #if defined(HOST_ARCH_MIPS) | 13 #if defined(HOST_ARCH_MIPS) |
10 #include <asm/cachectl.h> /* NOLINT */ | 14 #include <asm/cachectl.h> /* NOLINT */ |
11 #include <sys/syscall.h> /* NOLINT */ | 15 #include <sys/syscall.h> /* NOLINT */ |
12 #include <unistd.h> /* NOLINT */ | 16 #include <unistd.h> /* NOLINT */ |
13 #endif | 17 #endif |
14 | 18 |
15 #include "vm/cpu.h" | |
16 | |
17 namespace dart { | 19 namespace dart { |
18 | 20 |
19 void CPU::FlushICache(uword start, uword size) { | 21 void CPU::FlushICache(uword start, uword size) { |
20 #if defined(HOST_ARCH_MIPS) | 22 #if defined(HOST_ARCH_MIPS) |
21 int res; | 23 int res; |
22 // See http://www.linux-mips.org/wiki/Cacheflush_Syscall. | 24 // See http://www.linux-mips.org/wiki/Cacheflush_Syscall. |
23 res = syscall(__NR_cacheflush, start, size, ICACHE); | 25 res = syscall(__NR_cacheflush, start, size, ICACHE); |
24 ASSERT(res == 0); | 26 ASSERT(res == 0); |
25 #else // defined(HOST_ARCH_MIPS) | 27 #else // defined(HOST_ARCH_MIPS) |
26 // When running in simulated mode we do not need to flush the ICache because | 28 // When running in simulated mode we do not need to flush the ICache because |
27 // we are not running on the actual hardware. | 29 // we are not running on the actual hardware. |
28 #endif // defined(HOST_ARCH_MIPS) | 30 #endif // defined(HOST_ARCH_MIPS) |
29 } | 31 } |
30 | 32 |
31 | 33 |
32 const char* CPU::Id() { | 34 const char* CPU::Id() { |
33 return | 35 return |
34 #if !defined(HOST_ARCH_MIPS) | 36 #if !defined(HOST_ARCH_MIPS) |
35 "sim" | 37 "sim" |
36 #endif // !defined(HOST_ARCH_MIPS) | 38 #endif // !defined(HOST_ARCH_MIPS) |
37 "mips"; | 39 "mips"; |
38 } | 40 } |
39 | 41 |
| 42 |
| 43 const char* HostCPUFeatures::hardware_ = NULL; |
| 44 #if defined(DEBUG) |
| 45 bool HostCPUFeatures::initialized_ = false; |
| 46 #endif |
| 47 |
| 48 |
| 49 #if defined(HOST_ARCH_MIPS) |
| 50 void HostCPUFeatures::InitOnce() { |
| 51 CpuInfo::InitOnce(); |
| 52 hardware_ = CpuInfo::GetCpuModel(); |
| 53 // Has a floating point unit. |
| 54 ASSERT(CpuInfo::FieldContains(kCpuInfoModel, "FPU")); |
| 55 #if defined(DEBUG) |
| 56 initialized_ = true; |
| 57 #endif |
| 58 } |
| 59 |
| 60 |
| 61 void HostCPUFeatures::Cleanup() { |
| 62 DEBUG_ASSERT(initialized_); |
| 63 #if defined(DEBUG) |
| 64 initialized_ = false; |
| 65 #endif |
| 66 ASSERT(hardware_ != NULL); |
| 67 delete[] hardware_; |
| 68 hardware_ = NULL; |
| 69 CpuInfo::Cleanup(); |
| 70 } |
| 71 |
| 72 #else |
| 73 |
| 74 void HostCPUFeatures::InitOnce() { |
| 75 CpuInfo::InitOnce(); |
| 76 hardware_ = CpuInfo::GetCpuModel(); |
| 77 #if defined(DEBUG) |
| 78 initialized_ = true; |
| 79 #endif |
| 80 } |
| 81 |
| 82 |
| 83 void HostCPUFeatures::Cleanup() { |
| 84 DEBUG_ASSERT(initialized_); |
| 85 #if defined(DEBUG) |
| 86 initialized_ = false; |
| 87 #endif |
| 88 ASSERT(hardware_ != NULL); |
| 89 delete[] hardware_; |
| 90 hardware_ = NULL; |
| 91 CpuInfo::Cleanup(); |
| 92 } |
| 93 #endif // defined(HOST_ARCH_MIPS) |
| 94 |
40 } // namespace dart | 95 } // namespace dart |
41 | 96 |
42 #endif // defined TARGET_ARCH_MIPS | 97 #endif // defined TARGET_ARCH_MIPS |
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