Updates refactoring of CPU feature detection

runtime/vm/assembler_arm_test.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
+#include "vm/cpu.h"
 #include "vm/os.h"
 #include "vm/unit_test.h"
 #include "vm/virtual_memory.h"
 
 namespace dart {
 
 #define __ assembler->
 
 
 ASSEMBLER_TEST_GENERATE(Simple, assembler) {
@@ skipping 1431 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(VstmsVldms_off, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Udiv, assembler) {
-  if (CPUFeatures::integer_division_supported()) {
+  if (TargetCPUFeatures::integer_division_supported()) {
     __ mov(R0, ShifterOperand(27));
     __ mov(R1, ShifterOperand(9));
     __ udiv(R2, R0, R1);
     __ mov(R0, ShifterOperand(R2));
   } else {
     __ mov(R0, ShifterOperand(3));
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Udiv, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Sdiv, assembler) {
-  if (CPUFeatures::integer_division_supported()) {
+  if (TargetCPUFeatures::integer_division_supported()) {
     __ mov(R0, ShifterOperand(27));
     __ LoadImmediate(R1, -9);
     __ sdiv(R2, R0, R1);
     __ mov(R0, ShifterOperand(R2));
   } else {
     __ LoadImmediate(R0, -3);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Sdiv, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(-3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Udiv_zero, assembler) {
-  if (CPUFeatures::integer_division_supported()) {
+  if (TargetCPUFeatures::integer_division_supported()) {
     __ mov(R0, ShifterOperand(27));
     __ mov(R1, ShifterOperand(0));
     __ udiv(R2, R0, R1);
     __ mov(R0, ShifterOperand(R2));
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Udiv_zero, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Sdiv_zero, assembler) {
-  if (CPUFeatures::integer_division_supported()) {
+  if (TargetCPUFeatures::integer_division_supported()) {
     __ mov(R0, ShifterOperand(27));
     __ mov(R1, ShifterOperand(0));
     __ udiv(R2, R0, R1);
     __ mov(R0, ShifterOperand(R2));
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Sdiv_zero, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Udiv_corner, assembler) {
-  if (CPUFeatures::integer_division_supported()) {
+  if (TargetCPUFeatures::integer_division_supported()) {
     __ LoadImmediate(R0, 0x80000000);
     __ LoadImmediate(R1, 0xffffffff);
     __ udiv(R2, R0, R1);
     __ mov(R0, ShifterOperand(R2));
   } else {
     __ LoadImmediate(R0, 0);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Udiv_corner, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Sdiv_corner, assembler) {
-  if (CPUFeatures::integer_division_supported()) {
+  if (TargetCPUFeatures::integer_division_supported()) {
     __ LoadImmediate(R0, 0x80000000);
     __ LoadImmediate(R1, 0xffffffff);
     __ sdiv(R2, R0, R1);
     __ mov(R0, ShifterOperand(R2));
   } else {
     __ LoadImmediate(R0, 0x80000000);
   }
   __ bx(LR);
 }
 
 
 ASSEMBLER_TEST_RUN(Sdiv_corner, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(static_cast<int32_t>(0x80000000),
             EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(IntDiv_supported, assembler) {
 #if defined(USING_SIMULATOR)
-  bool orig = CPUFeatures::integer_division_supported();
-  CPUFeatures::set_integer_division_supported(true);
+  bool orig = TargetCPUFeatures::integer_division_supported();
+  HostCPUFeatures::set_integer_division_supported(true);
   __ mov(R0, ShifterOperand(27));
   __ mov(R1, ShifterOperand(9));
   __ IntegerDivide(R0, R0, R1, D0, D1);
-  CPUFeatures::set_integer_division_supported(orig);
+  HostCPUFeatures::set_integer_division_supported(orig);
   __ bx(LR);
 #else
   __ mov(R0, ShifterOperand(27));
   __ mov(R1, ShifterOperand(9));
   __ IntegerDivide(R0, R0, R1, D0, D1);
   __ bx(LR);
 #endif
 }
 
 
 ASSEMBLER_TEST_RUN(IntDiv_supported, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(IntDiv_unsupported, assembler) {
 #if defined(USING_SIMULATOR)
-  bool orig = CPUFeatures::integer_division_supported();
-  CPUFeatures::set_integer_division_supported(false);
+  bool orig = TargetCPUFeatures::integer_division_supported();
+  HostCPUFeatures::set_integer_division_supported(false);
   __ mov(R0, ShifterOperand(27));
   __ mov(R1, ShifterOperand(9));
   __ IntegerDivide(R0, R0, R1, D0, D1);
-  CPUFeatures::set_integer_division_supported(orig);
+  HostCPUFeatures::set_integer_division_supported(orig);
   __ bx(LR);
 #else
   __ mov(R0, ShifterOperand(27));
   __ mov(R1, ShifterOperand(9));
   __ IntegerDivide(R0, R0, R1, D0, D1);
   __ bx(LR);
 #endif
 }
 
 
@@ skipping 14 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Muls, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vaddqi8, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S1, R0);
     __ mov(R0, ShifterOperand(3));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S3, R0);
     __ mov(R0, ShifterOperand(5));
     __ vmovsr(S4, R0);
@@ skipping 23 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vaddqi8, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vaddqi16, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S1, R0);
     __ mov(R0, ShifterOperand(3));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S3, R0);
     __ mov(R0, ShifterOperand(5));
     __ vmovsr(S4, R0);
@@ skipping 23 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vaddqi16, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vaddqi32, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S1, R0);
     __ mov(R0, ShifterOperand(3));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S3, R0);
     __ mov(R0, ShifterOperand(5));
     __ vmovsr(S4, R0);
@@ skipping 23 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vaddqi32, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vaddqi64, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(3));
     __ vmovsr(S4, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S6, R0);
 
     __ vaddqi(kWordPair, Q2, Q0, Q1);
@@ skipping 11 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vaddqi64, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vsubqi8, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S1, R0);
     __ mov(R0, ShifterOperand(3));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S3, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S4, R0);
@@ skipping 23 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vsubqi8, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vsubqi16, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S1, R0);
     __ mov(R0, ShifterOperand(3));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S3, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S4, R0);
@@ skipping 23 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vsubqi16, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vsubqi32, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S1, R0);
     __ mov(R0, ShifterOperand(3));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S3, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S4, R0);
@@ skipping 23 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vsubqi32, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vsubqi64, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S4, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S6, R0);
 
     __ vsubqi(kWordPair, Q2, Q1, Q0);
@@ skipping 11 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vsubqi64, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmulqi8, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S1, R0);
     __ mov(R0, ShifterOperand(3));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S3, R0);
     __ mov(R0, ShifterOperand(5));
     __ vmovsr(S4, R0);
@@ skipping 23 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vmulqi8, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmulqi16, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S1, R0);
     __ mov(R0, ShifterOperand(3));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S3, R0);
     __ mov(R0, ShifterOperand(5));
     __ vmovsr(S4, R0);
@@ skipping 23 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vmulqi16, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmulqi32, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S1, R0);
     __ mov(R0, ShifterOperand(3));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S3, R0);
     __ mov(R0, ShifterOperand(5));
     __ vmovsr(S4, R0);
@@ skipping 23 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vmulqi32, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vaddqs, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
     __ LoadSImmediate(S4, 5.0);
     __ LoadSImmediate(S5, 6.0);
     __ LoadSImmediate(S6, 7.0);
     __ LoadSImmediate(S7, 8.0);
 
     __ vaddqs(Q2, Q0, Q1);
@@ skipping 14 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vaddqs, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(36, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vsubqs, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
     __ LoadSImmediate(S4, 2.0);
     __ LoadSImmediate(S5, 4.0);
     __ LoadSImmediate(S6, 6.0);
     __ LoadSImmediate(S7, 8.0);
 
     __ vsubqs(Q2, Q1, Q0);
@@ skipping 14 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vsubqs, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(10, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmulqs, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
     __ LoadSImmediate(S4, 5.0);
     __ LoadSImmediate(S5, 6.0);
     __ LoadSImmediate(S6, 7.0);
     __ LoadSImmediate(S7, 8.0);
 
     __ vmulqs(Q2, Q1, Q0);
@@ skipping 14 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vmulqs, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(70, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(VtblX, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     // Index.
     __ LoadImmediate(R0, 0x03020100);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
 
     // Table.
     __ LoadSImmediate(S2, 1.0);
     __ LoadSImmediate(S3, 2.0);
     __ LoadSImmediate(S4, 3.0);
     __ LoadSImmediate(S5, 4.0);
@@ skipping 22 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(VtblX, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(VtblY, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     // Index.
     __ LoadImmediate(R0, 0x07060504);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
 
     // Table.
     __ LoadSImmediate(S2, 2.0);
     __ LoadSImmediate(S3, 1.0);
     __ LoadSImmediate(S4, 3.0);
     __ LoadSImmediate(S5, 4.0);
@@ skipping 22 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(VtblY, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(VtblZ, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     // Index.
     __ LoadImmediate(R0, 0x0b0a0908);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
 
     // Table.
     __ LoadSImmediate(S2, 2.0);
     __ LoadSImmediate(S3, 3.0);
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, 4.0);
@@ skipping 22 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(VtblZ, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(VtblW, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     // Index.
     __ LoadImmediate(R0, 0x0f0e0d0c);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
 
     // Table.
     __ LoadSImmediate(S2, 2.0);
     __ LoadSImmediate(S3, 3.0);
     __ LoadSImmediate(S4, 4.0);
     __ LoadSImmediate(S5, 1.0);
@@ skipping 22 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(VtblW, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Veorq, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     // Q0
     __ LoadImmediate(R0, 0xaaaaaaab);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
     __ vmovsr(S2, R0);
     __ vmovsr(S3, R0);
 
     // Q1
     __ LoadImmediate(R0, 0x55555555);
     __ vmovsr(S4, R0);
@@ skipping 21 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Veorq, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(-8, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vornq, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     // Q0
     __ LoadImmediate(R0, 0xfffffff0);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
     __ vmovsr(S2, R0);
     __ vmovsr(S3, R0);
 
     // Q1
     __ LoadImmediate(R0, 0);
     __ vmovsr(S4, R0);
@@ skipping 21 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vornq, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(60, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vorrq, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     // Q0
     __ LoadImmediate(R0, 0xaaaaaaaa);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
     __ vmovsr(S2, R0);
     __ vmovsr(S3, R0);
 
     // Q1
     __ LoadImmediate(R0, 0x55555555);
     __ vmovsr(S4, R0);
@@ skipping 21 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vorrq, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vandq, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     // Q0
     __ LoadImmediate(R0, 0xaaaaaaab);
     __ vmovsr(S0, R0);
     __ vmovsr(S1, R0);
     __ vmovsr(S2, R0);
     __ vmovsr(S3, R0);
 
     // Q1
     __ LoadImmediate(R0, 0x55555555);
     __ vmovsr(S4, R0);
@@ skipping 21 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vandq, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmovq, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     // Q0
     __ LoadSImmediate(S0, 1.0);
     __ vmovs(S1, S0);
     __ vmovs(S2, S0);
     __ vmovs(S3, S0);
 
     // Q0
     __ LoadSImmediate(S4, -1.0);
     __ vmovs(S5, S0);
     __ vmovs(S6, S0);
@@ skipping 17 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vmovq, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vdupb, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadImmediate(R0, 0x00000000);
     __ LoadImmediate(R1, 0x00ff0000);
     __ vmovsr(S4, R0);
     __ vmovsr(S5, R1);
 
     // Should copy 0xff to each byte of Q0.
     __ vdup(kByte, Q0, D2, 6);
 
     __ vmovrs(R0, S0);
     __ vmovrs(R1, S1);
@@ skipping 12 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vdupb, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vduph, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadImmediate(R0, 0xffff0000);
     __ LoadImmediate(R1, 0x00000000);
     __ vmovsr(S4, R0);
     __ vmovsr(S5, R1);
 
     // Should copy 0xff to each byte of Q0.
     __ vdup(kHalfword, Q0, D2, 1);
 
     __ vmovrs(R0, S0);
     __ vmovrs(R1, S1);
@@ skipping 12 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vduph, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vdupw, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadImmediate(R0, 0x00000000);
     __ LoadImmediate(R1, 0xffffffff);
     __ vmovsr(S4, R0);
     __ vmovsr(S5, R1);
 
     // Should copy 0xff to each byte of Q0.
     __ vdup(kWord, Q0, D2, 1);
 
     __ vmovrs(R0, S0);
     __ vmovrs(R1, S1);
@@ skipping 12 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vdupw, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(-4, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vzipqw, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 0.0);
     __ LoadSImmediate(S1, 1.0);
     __ LoadSImmediate(S2, 2.0);
     __ LoadSImmediate(S3, 3.0);
     __ LoadSImmediate(S4, 4.0);
     __ LoadSImmediate(S5, 5.0);
     __ LoadSImmediate(S6, 6.0);
     __ LoadSImmediate(S7, 7.0);
 
     __ vzipqw(Q0, Q1);
@@ skipping 13 matching lines @@
 
 ASSEMBLER_TEST_RUN(Vzipqw, test) {
   EXPECT(test != NULL);
   typedef float (*Vzipqw)();
   float res = EXECUTE_TEST_CODE_FLOAT(Vzipqw, test->entry());
   EXPECT_FLOAT_EQ(8.0, res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vceqqi32, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S1, R0);
     __ mov(R0, ShifterOperand(3));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S3, R0);
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S4, R0);
@@ skipping 23 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vceqqi32, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vceqqs, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, 4.0);
     __ LoadSImmediate(S6, 3.0);
     __ LoadSImmediate(S7, 8.0);
 
     __ vceqqs(Q2, Q1, Q0);
@@ skipping 15 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vceqqs, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vcgeqi32, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S1, R0);
     __ mov(R0, ShifterOperand(3));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S3, R0);
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S4, R0);
@@ skipping 23 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vcgeqi32, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vcugeqi32, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S1, R0);
     __ mov(R0, ShifterOperand(3));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S3, R0);
     __ LoadImmediate(R0, -1);
     __ vmovsr(S4, R0);
@@ skipping 23 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vcugeqi32, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vcgeqs, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, 1.0);
     __ LoadSImmediate(S6, 3.0);
     __ LoadSImmediate(S7, 1.0);
 
     __ vcgeqs(Q2, Q1, Q0);
@@ skipping 15 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vcgeqs, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vcgtqi32, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S1, R0);
     __ mov(R0, ShifterOperand(3));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S3, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S4, R0);
@@ skipping 23 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vcgtqi32, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vcugtqi32, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ mov(R0, ShifterOperand(1));
     __ vmovsr(S0, R0);
     __ mov(R0, ShifterOperand(2));
     __ vmovsr(S1, R0);
     __ mov(R0, ShifterOperand(3));
     __ vmovsr(S2, R0);
     __ mov(R0, ShifterOperand(4));
     __ vmovsr(S3, R0);
     __ LoadImmediate(R0, -1);
     __ vmovsr(S4, R0);
@@ skipping 23 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vcugtqi32, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vcgtqs, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
     __ LoadSImmediate(S4, 2.0);
     __ LoadSImmediate(S5, 1.0);
     __ LoadSImmediate(S6, 4.0);
     __ LoadSImmediate(S7, 1.0);
 
     __ vcgtqs(Q2, Q1, Q0);
@@ skipping 15 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vcgtqs, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vminqs, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
 
     __ LoadSImmediate(S4, 2.0);
     __ LoadSImmediate(S5, 1.0);
     __ LoadSImmediate(S6, 6.0);
     __ LoadSImmediate(S7, 3.0);
 
@@ skipping 14 matching lines @@
 
 
 ASSEMBLER_TEST_RUN(Vminqs, test) {
   EXPECT(test != NULL);
   typedef int (*Tst)();
   EXPECT_EQ(8, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vmaxqs, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S0, 1.0);
     __ LoadSImmediate(S1, 2.0);
     __ LoadSImmediate(S2, 3.0);
     __ LoadSImmediate(S3, 4.0);
 
     __ LoadSImmediate(S4, 2.0);
     __ LoadSImmediate(S5, 1.0);
     __ LoadSImmediate(S6, 6.0);
     __ LoadSImmediate(S7, 3.0);
 
@@ skipping 49 matching lines @@
 
   // result = sign : result_exp<7:0> : estimate<51:29>
   int32_t result_bits =
       (a_bits & 0x80000000) | ((result_exp & 0xff) << 23) |
       ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
   return bit_cast<float, int32_t>(result_bits);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vrecpeqs, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
     __ vmovs(S7, S4);
 
     __ vrecpeqs(Q0, Q1);
 
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, arm_recip_estimate(147.0));
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vrecpeqs, test) {
   EXPECT(test != NULL);
   typedef float (*Vrecpeqs)();
   float res = EXECUTE_TEST_CODE_FLOAT(Vrecpeqs, test->entry());
   EXPECT_FLOAT_EQ(arm_recip_estimate(147.0), res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vrecpsqs, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 5.0);
     __ LoadSImmediate(S5, 2.0);
     __ LoadSImmediate(S6, 3.0);
     __ LoadSImmediate(S7, 4.0);
 
     __ LoadSImmediate(S8, 10.0);
     __ LoadSImmediate(S9, 1.0);
     __ LoadSImmediate(S10, 6.0);
     __ LoadSImmediate(S11, 3.0);
 
     __ vrecpsqs(Q0, Q1, Q2);
 
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, 2.0 - 10.0 * 5.0);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vrecpsqs, test) {
   EXPECT(test != NULL);
   typedef float (*Vrecpsqs)();
   float res = EXECUTE_TEST_CODE_FLOAT(Vrecpsqs, test->entry());
   EXPECT_FLOAT_EQ(2.0 - 10.0 * 5.0, res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Reciprocal, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147000.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
     __ vmovs(S7, S4);
 
     // Reciprocal estimate.
     __ vrecpeqs(Q0, Q1);
     // 2 Newton-Raphson steps.
     __ vrecpsqs(Q2, Q1, Q0);
     __ vmulqs(Q0, Q0, Q2);
@@ skipping 61 matching lines @@
   ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0)));
 
   // result = 0 : result_exp<7:0> : estimate<51:29>
   int32_t result_bits = ((result_exp & 0xff) << 23) |
       ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
   return bit_cast<float, int32_t>(result_bits);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vrsqrteqs, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
     __ vmovs(S7, S4);
 
     __ vrsqrteqs(Q0, Q1);
 
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, arm_reciprocal_sqrt_estimate(147.0));
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vrsqrteqs, test) {
   EXPECT(test != NULL);
   typedef float (*Vrsqrteqs)();
   float res = EXECUTE_TEST_CODE_FLOAT(Vrsqrteqs, test->entry());
   EXPECT_FLOAT_EQ(arm_reciprocal_sqrt_estimate(147.0), res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vrsqrtsqs, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 5.0);
     __ LoadSImmediate(S5, 2.0);
     __ LoadSImmediate(S6, 3.0);
     __ LoadSImmediate(S7, 4.0);
 
     __ LoadSImmediate(S8, 10.0);
     __ LoadSImmediate(S9, 1.0);
     __ LoadSImmediate(S10, 6.0);
     __ LoadSImmediate(S11, 3.0);
 
     __ vrsqrtsqs(Q0, Q1, Q2);
 
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, (3.0 - 10.0 * 5.0) / 2.0);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vrsqrtsqs, test) {
   EXPECT(test != NULL);
   typedef float (*Vrsqrtsqs)();
   float res = EXECUTE_TEST_CODE_FLOAT(Vrsqrtsqs, test->entry());
   EXPECT_FLOAT_EQ((3.0 - 10.0 * 5.0)/2.0, res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(ReciprocalSqrt, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147000.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
     __ vmovs(S7, S4);
 
     // Reciprocal square root estimate.
     __ vrsqrteqs(Q0, Q1);
     // 2 Newton-Raphson steps. xn+1 = xn * (3 - Q1*xn^2) / 2.
     // First step.
     __ vmulqs(Q2, Q0, Q0);  // Q2 <- xn^2
@@ skipping 14 matching lines @@
 
 ASSEMBLER_TEST_RUN(ReciprocalSqrt, test) {
   EXPECT(test != NULL);
   typedef float (*ReciprocalSqrt)();
   float res = EXECUTE_TEST_CODE_FLOAT(ReciprocalSqrt, test->entry());
   EXPECT_FLOAT_EQ(1.0/sqrt(147000.0), res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(SIMDSqrt, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 147000.0);
     __ vmovs(S5, S4);
     __ vmovs(S6, S4);
     __ vmovs(S7, S4);
 
     // Reciprocal square root estimate.
     __ vrsqrteqs(Q0, Q1);
     // 2 Newton-Raphson steps. xn+1 = xn * (3 - Q1*xn^2) / 2.
     // First step.
     __ vmulqs(Q2, Q0, Q0);  // Q2 <- xn^2
@@ skipping 24 matching lines @@
 
 ASSEMBLER_TEST_RUN(SIMDSqrt, test) {
   EXPECT(test != NULL);
   typedef float (*SIMDSqrt)();
   float res = EXECUTE_TEST_CODE_FLOAT(SIMDSqrt, test->entry());
   EXPECT_FLOAT_EQ(sqrt(147000.0), res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(SIMDSqrt2, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, 4.0);
     __ LoadSImmediate(S6, 9.0);
     __ LoadSImmediate(S7, 16.0);
 
     // Reciprocal square root estimate.
     __ vrsqrteqs(Q0, Q1);
     // 2 Newton-Raphson steps. xn+1 = xn * (3 - Q1*xn^2) / 2.
     // First step.
     __ vmulqs(Q2, Q0, Q0);  // Q2 <- xn^2
@@ skipping 28 matching lines @@
 
 ASSEMBLER_TEST_RUN(SIMDSqrt2, test) {
   EXPECT(test != NULL);
   typedef float (*SIMDSqrt2)();
   float res = EXECUTE_TEST_CODE_FLOAT(SIMDSqrt2, test->entry());
   EXPECT_FLOAT_EQ(10.0, res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(SIMDDiv, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, 4.0);
     __ LoadSImmediate(S6, 9.0);
     __ LoadSImmediate(S7, 16.0);
 
     __ LoadSImmediate(S12, 4.0);
     __ LoadSImmediate(S13, 16.0);
     __ LoadSImmediate(S14, 36.0);
     __ LoadSImmediate(S15, 64.0);
 
@@ skipping 20 matching lines @@
 
 ASSEMBLER_TEST_RUN(SIMDDiv, test) {
   EXPECT(test != NULL);
   typedef float (*SIMDDiv)();
   float res = EXECUTE_TEST_CODE_FLOAT(SIMDDiv, test->entry());
   EXPECT_FLOAT_EQ(16.0, res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vabsqs, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, -1.0);
     __ LoadSImmediate(S6, 1.0);
     __ LoadSImmediate(S7, -1.0);
 
     __ vabsqs(Q0, Q1);
 
     __ vadds(S0, S0, S1);
     __ vadds(S0, S0, S2);
     __ vadds(S0, S0, S3);
 
     __ bx(LR);
   } else {
     __ LoadSImmediate(S0, 4.0);
     __ bx(LR);
   }
 }
 
 
 ASSEMBLER_TEST_RUN(Vabsqs, test) {
   EXPECT(test != NULL);
   typedef float (*Vabsqs)();
   float res = EXECUTE_TEST_CODE_FLOAT(Vabsqs, test->entry());
   EXPECT_FLOAT_EQ(4.0, res, 0.0001f);
 }
 
 
 ASSEMBLER_TEST_GENERATE(Vnegqs, assembler) {
-  if (CPUFeatures::neon_supported()) {
+  if (TargetCPUFeatures::neon_supported()) {
     __ LoadSImmediate(S4, 1.0);
     __ LoadSImmediate(S5, -2.0);
     __ LoadSImmediate(S6, 1.0);
     __ LoadSImmediate(S7, -2.0);
 
     __ vnegqs(Q0, Q1);
 
     __ vadds(S0, S0, S1);
     __ vadds(S0, S0, S2);
     __ vadds(S0, S0, S3);
@@ skipping 25 matching lines @@
   __ StoreIntoObject(R2,
                      FieldAddress(R2, GrowableObjectArray::data_offset()),
                      R1);
   __ PopList((1 << CTX) | (1 << LR));
   __ Ret();
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM