A64: Implement patchable inline code for InstanceOfKnownGlobal.

src/a64/assembler-a64.h

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 1676 matching lines @@
 
    private:
     Assembler* assem_;
 
     DISALLOW_IMPLICIT_CONSTRUCTORS(BlockConstPoolScope);
   };
 
   // Check if is time to emit a constant pool.
   void CheckConstPool(bool force_emit, bool require_jump);
 
+  // Available for constrained code generation scopes. Prefer
+  // MacroAssembler::Mov() when possible.
+  inline void LoadRelocated(const CPURegister& rt, const Operand& operand);
+
  protected:
   inline const Register& AppropriateZeroRegFor(const CPURegister& reg) const;
 
   void LoadStore(const CPURegister& rt,
                  const MemOperand& addr,
                  LoadStoreOp op);
   static bool IsImmLSUnscaled(ptrdiff_t offset);
   static bool IsImmLSScaled(ptrdiff_t offset, LSDataSize size);
 
   void Logical(const Register& rd,
@@ skipping 36 matching lines @@
                        Extend extend,
                        unsigned left_shift);
 
   void AddSub(const Register& rd,
               const Register& rn,
               const Operand& operand,
               FlagsUpdate S,
               AddSubOp op);
   static bool IsImmAddSub(int64_t immediate);
 
-  inline void LoadRelocated(const CPURegister& rt, const Operand& operand);
-
   static bool IsImmFP32(float imm);
   static bool IsImmFP64(double imm);
 
   // Find an appropriate LoadStoreOp or LoadStorePairOp for the specified
   // registers. Only simple loads are supported; sign- and zero-extension (such
   // as in LDPSW_x or LDRB_w) are not supported.
   static inline LoadStoreOp LoadOpFor(const CPURegister& rt);
   static inline LoadStorePairOp LoadPairOpFor(const CPURegister& rt,
                                               const CPURegister& rt2);
   static inline LoadStoreOp StoreOpFor(const CPURegister& rt);
@@ skipping 264 matching lines @@
 class EnsureSpace BASE_EMBEDDED {
  public:
   explicit EnsureSpace(Assembler* assembler) {
     assembler->CheckBuffer();
   }
 };
 
 } }  // namespace v8::internal
 
 #endif  // V8_A64_ASSEMBLER_A64_H_