Subzero: Improve handling of alloca instructions of constant size.

src/IceTargetLoweringX86BaseImpl.h

 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 773 matching lines @@
 /// This assumes Arg is an argument passed on the stack. This sets the frame
 /// offset for Arg and updates InArgsSizeBytes according to Arg's width. For an
 /// I64 arg that has been split into Lo and Hi components, it calls itself
 /// recursively on the components, taking care to handle Lo first because of the
 /// little-endian architecture. Lastly, this function generates an instruction
 /// to copy Arg into its assigned register if applicable.
 template <class Machine>
 void TargetX86Base<Machine>::finishArgumentLowering(Variable *Arg,
                                                     Variable *FramePtr,
                                                     size_t BasicFrameOffset,
+                                                    size_t StackAdjBytes,
                                                     size_t &InArgsSizeBytes) {
   if (!Traits::Is64Bit) {
     if (auto *Arg64On32 = llvm::dyn_cast<Variable64On32>(Arg)) {
       Variable *Lo = Arg64On32->getLo();
       Variable *Hi = Arg64On32->getHi();
-      finishArgumentLowering(Lo, FramePtr, BasicFrameOffset, InArgsSizeBytes);
-      finishArgumentLowering(Hi, FramePtr, BasicFrameOffset, InArgsSizeBytes);
+      finishArgumentLowering(Lo, FramePtr, BasicFrameOffset, StackAdjBytes,
+                             InArgsSizeBytes);
+      finishArgumentLowering(Hi, FramePtr, BasicFrameOffset, StackAdjBytes,
+                             InArgsSizeBytes);
       return;
     }
   }
   Type Ty = Arg->getType();
   if (isVectorType(Ty)) {
     InArgsSizeBytes = Traits::applyStackAlignment(InArgsSizeBytes);
   }
   Arg->setStackOffset(BasicFrameOffset + InArgsSizeBytes);
   InArgsSizeBytes += typeWidthInBytesOnStack(Ty);
   if (Arg->hasReg()) {
     assert(Ty != IceType_i64 || Traits::Is64Bit);
     typename Traits::X86OperandMem *Mem = Traits::X86OperandMem::create(
-        Func, Ty, FramePtr, Ctx->getConstantInt32(Arg->getStackOffset()));
+        Func, Ty, FramePtr,
+        Ctx->getConstantInt32(Arg->getStackOffset() + StackAdjBytes));
     if (isVectorType(Arg->getType())) {
       _movp(Arg, Mem);
     } else {
       _mov(Arg, Mem);
     }
     // This argument-copying instruction uses an explicit Traits::X86OperandMem
     // operand instead of a Variable, so its fill-from-stack operation has to
     // be tracked separately for statistics.
     Ctx->statsUpdateFills();
   }
@@ skipping 74 matching lines @@
 
 template <class Machine>
 llvm::SmallBitVector
 TargetX86Base<Machine>::getRegisterSet(RegSetMask Include,
                                        RegSetMask Exclude) const {
   return Traits::getRegisterSet(Include, Exclude);
 }
 
 template <class Machine>
 void TargetX86Base<Machine>::lowerAlloca(const InstAlloca *Inst) {
-  IsEbpBasedFrame = true;
+  if (!Inst->getKnownFrameOffset())
+    IsEbpBasedFrame = true;
   // Conservatively require the stack to be aligned. Some stack adjustment
   // operations implemented below assume that the stack is aligned before the
   // alloca. All the alloca code ensures that the stack alignment is preserved
   // after the alloca. The stack alignment restriction can be relaxed in some
   // cases.
   NeedsStackAlignment = true;
 
   // TODO(stichnot): minimize the number of adjustments of esp, etc.
   Variable *esp = getPhysicalRegister(Traits::RegisterSet::Reg_esp);
   Operand *TotalSize = legalize(Inst->getSizeInBytes());
   Variable *Dest = Inst->getDest();
   uint32_t AlignmentParam = Inst->getAlignInBytes();
   // For default align=0, set it to the real value 1, to avoid any
   // bit-manipulation problems below.
   AlignmentParam = std::max(AlignmentParam, 1u);
 
   // LLVM enforces power of 2 alignment.
   assert(llvm::isPowerOf2_32(AlignmentParam));
   assert(llvm::isPowerOf2_32(Traits::X86_STACK_ALIGNMENT_BYTES));
 
   uint32_t Alignment =
       std::max(AlignmentParam, Traits::X86_STACK_ALIGNMENT_BYTES);
   if (Alignment > Traits::X86_STACK_ALIGNMENT_BYTES) {
     _and(esp, Ctx->getConstantInt32(-Alignment));
   }
   if (const auto *ConstantTotalSize =
           llvm::dyn_cast<ConstantInteger32>(TotalSize)) {
     uint32_t Value = ConstantTotalSize->getValue();
     Value = Utils::applyAlignment(Value, Alignment);
-    _sub(esp, Ctx->getConstantInt32(Value));
+    if (Inst->getKnownFrameOffset()) {
+      _adjust_stack(Value);
+      FixedAllocaSizeBytes += Value;
+    } else {
+      _sub(esp, Ctx->getConstantInt32(Value));
+    }
   } else {
     // Non-constant sizes need to be adjusted to the next highest multiple of
     // the required alignment at runtime.
     Variable *T = makeReg(IceType_i32);
     _mov(T, TotalSize);
     _add(T, Ctx->getConstantInt32(Alignment - 1));
     _and(T, Ctx->getConstantInt32(-Alignment));
     _sub(esp, T);
   }
   _mov(Dest, esp);
@@ skipping 4525 matching lines @@
   }
   // the offset is not eligible for blinding or pooling, return the original
   // mem operand
   return MemOperand;
 }
 
 } // end of namespace X86Internal
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H