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1 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===// | 1 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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121 template <typename T = Traits> | 121 template <typename T = Traits> |
122 typename std::enable_if<!T::Is64Bit, Operand>::type * | 122 typename std::enable_if<!T::Is64Bit, Operand>::type * |
123 hiOperand(Operand *Operand); | 123 hiOperand(Operand *Operand); |
124 template <typename T = Traits> | 124 template <typename T = Traits> |
125 typename std::enable_if<T::Is64Bit, Operand>::type *hiOperand(Operand *) { | 125 typename std::enable_if<T::Is64Bit, Operand>::type *hiOperand(Operand *) { |
126 llvm::report_fatal_error( | 126 llvm::report_fatal_error( |
127 "Hey, yo! This is x86-64. Watcha doin'? (hiOperand)"); | 127 "Hey, yo! This is x86-64. Watcha doin'? (hiOperand)"); |
128 } | 128 } |
129 | 129 |
130 void finishArgumentLowering(Variable *Arg, Variable *FramePtr, | 130 void finishArgumentLowering(Variable *Arg, Variable *FramePtr, |
131 size_t BasicFrameOffset, size_t &InArgsSizeBytes); | 131 size_t BasicFrameOffset, size_t StackAdjBytes, |
| 132 size_t &InArgsSizeBytes); |
132 typename Traits::Address stackVarToAsmOperand(const Variable *Var) const; | 133 typename Traits::Address stackVarToAsmOperand(const Variable *Var) const; |
133 | 134 |
134 typename Traits::InstructionSet getInstructionSet() const { | 135 typename Traits::InstructionSet getInstructionSet() const { |
135 return InstructionSet; | 136 return InstructionSet; |
136 } | 137 } |
137 Operand *legalizeUndef(Operand *From, int32_t RegNum = Variable::NoRegister); | 138 Operand *legalizeUndef(Operand *From, int32_t RegNum = Variable::NoRegister); |
138 | 139 |
139 protected: | 140 protected: |
140 explicit TargetX86Base(Cfg *Func); | 141 explicit TargetX86Base(Cfg *Func); |
141 | 142 |
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668 }; | 669 }; |
669 | 670 |
670 bool optimizeScalarMul(Variable *Dest, Operand *Src0, int32_t Src1); | 671 bool optimizeScalarMul(Variable *Dest, Operand *Src0, int32_t Src1); |
671 void findRMW(); | 672 void findRMW(); |
672 | 673 |
673 typename Traits::InstructionSet InstructionSet = | 674 typename Traits::InstructionSet InstructionSet = |
674 Traits::InstructionSet::Begin; | 675 Traits::InstructionSet::Begin; |
675 bool IsEbpBasedFrame = false; | 676 bool IsEbpBasedFrame = false; |
676 bool NeedsStackAlignment = false; | 677 bool NeedsStackAlignment = false; |
677 size_t SpillAreaSizeBytes = 0; | 678 size_t SpillAreaSizeBytes = 0; |
| 679 size_t FixedAllocaSizeBytes = 0; |
678 std::array<llvm::SmallBitVector, IceType_NUM> TypeToRegisterSet; | 680 std::array<llvm::SmallBitVector, IceType_NUM> TypeToRegisterSet; |
679 std::array<llvm::SmallBitVector, Traits::RegisterSet::Reg_NUM> | 681 std::array<llvm::SmallBitVector, Traits::RegisterSet::Reg_NUM> |
680 RegisterAliases; | 682 RegisterAliases; |
681 llvm::SmallBitVector ScratchRegs; | 683 llvm::SmallBitVector ScratchRegs; |
682 llvm::SmallBitVector RegsUsed; | 684 llvm::SmallBitVector RegsUsed; |
683 std::array<VarList, IceType_NUM> PhysicalRegisters; | 685 std::array<VarList, IceType_NUM> PhysicalRegisters; |
684 | 686 |
685 /// Randomize a given immediate operand | 687 /// Randomize a given immediate operand |
686 Operand *randomizeOrPoolImmediate(Constant *Immediate, | 688 Operand *randomizeOrPoolImmediate(Constant *Immediate, |
687 int32_t RegNum = Variable::NoRegister); | 689 int32_t RegNum = Variable::NoRegister); |
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714 } | 716 } |
715 | 717 |
716 BoolFolding FoldingInfo; | 718 BoolFolding FoldingInfo; |
717 }; | 719 }; |
718 } // end of namespace X86Internal | 720 } // end of namespace X86Internal |
719 } // end of namespace Ice | 721 } // end of namespace Ice |
720 | 722 |
721 #include "IceTargetLoweringX86BaseImpl.h" | 723 #include "IceTargetLoweringX86BaseImpl.h" |
722 | 724 |
723 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H | 725 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H |
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