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1 //===- subzero/src/IceCfg.cpp - Control flow graph implementation ---------===// | 1 //===- subzero/src/IceCfg.cpp - Control flow graph implementation ---------===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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194 addCallToProfileSummary(); | 194 addCallToProfileSummary(); |
195 } | 195 } |
196 dump("Profiled CFG"); | 196 dump("Profiled CFG"); |
197 } | 197 } |
198 | 198 |
199 // Create the Hi and Lo variables where a split was needed | 199 // Create the Hi and Lo variables where a split was needed |
200 for (Variable *Var : Variables) | 200 for (Variable *Var : Variables) |
201 if (auto Var64On32 = llvm::dyn_cast<Variable64On32>(Var)) | 201 if (auto Var64On32 = llvm::dyn_cast<Variable64On32>(Var)) |
202 Var64On32->initHiLo(this); | 202 Var64On32->initHiLo(this); |
203 | 203 |
| 204 // Figure out which alloca instructions result in storage at known stack frame |
| 205 // offsets. If this is true for all alloca instructions, then a stack pointer |
| 206 // can still be used instead of a frame pointer, freeing up the frame pointer |
| 207 // for normal register allocation. Additionally, for each such alloca, its |
| 208 // address could be rematerialized at each use in terms of the stack/frame |
| 209 // pointer, saving a stack slot and a load from that stack slot. |
| 210 // |
| 211 // This simple implementation is limited to alloca instructions at the start |
| 212 // of the entry node. |
| 213 for (Inst &Instr : getEntryNode()->getInsts()) { |
| 214 if (auto *Alloca = llvm::dyn_cast<InstAlloca>(&Instr)) { |
| 215 if (llvm::isa<Constant>(Alloca->getSizeInBytes())) { |
| 216 Alloca->setKnownFrameOffset(); |
| 217 continue; |
| 218 } |
| 219 } |
| 220 // The first instruction that is not an alloca with a constant size stops |
| 221 // the search. |
| 222 break; |
| 223 } |
| 224 |
204 // The set of translation passes and their order are determined by the | 225 // The set of translation passes and their order are determined by the |
205 // target. | 226 // target. |
206 getTarget()->translate(); | 227 getTarget()->translate(); |
207 | 228 |
208 dump("Final output"); | 229 dump("Final output"); |
209 if (getFocusedTiming()) | 230 if (getFocusedTiming()) |
210 getContext()->dumpTimers(); | 231 getContext()->dumpTimers(); |
211 } | 232 } |
212 | 233 |
213 void Cfg::computeInOutEdges() { | 234 void Cfg::computeInOutEdges() { |
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787 } | 808 } |
788 } | 809 } |
789 // Print each basic block | 810 // Print each basic block |
790 for (CfgNode *Node : Nodes) | 811 for (CfgNode *Node : Nodes) |
791 Node->dump(this); | 812 Node->dump(this); |
792 if (isVerbose(IceV_Instructions)) | 813 if (isVerbose(IceV_Instructions)) |
793 Str << "}\n"; | 814 Str << "}\n"; |
794 } | 815 } |
795 | 816 |
796 } // end of namespace Ice | 817 } // end of namespace Ice |
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