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1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// | 1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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103 void emit(const ConstantFloat *C) const final; | 103 void emit(const ConstantFloat *C) const final; |
104 void emit(const ConstantDouble *C) const final; | 104 void emit(const ConstantDouble *C) const final; |
105 | 105 |
106 void lowerArguments() override; | 106 void lowerArguments() override; |
107 void addProlog(CfgNode *Node) override; | 107 void addProlog(CfgNode *Node) override; |
108 void addEpilog(CfgNode *Node) override; | 108 void addEpilog(CfgNode *Node) override; |
109 | 109 |
110 Operand *loOperand(Operand *Operand); | 110 Operand *loOperand(Operand *Operand); |
111 Operand *hiOperand(Operand *Operand); | 111 Operand *hiOperand(Operand *Operand); |
112 void finishArgumentLowering(Variable *Arg, Variable *FramePtr, | 112 void finishArgumentLowering(Variable *Arg, Variable *FramePtr, |
113 size_t BasicFrameOffset, size_t &InArgsSizeBytes); | 113 size_t BasicFrameOffset, size_t StackAdjBytes, |
John
2015/09/23 15:28:59
What's the point of the ARM changes? you're passin
Jim Stichnoth
2015/09/23 20:17:01
Good point - for some reason I thought finishArgum
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114 size_t &InArgsSizeBytes); | |
114 | 115 |
115 bool hasCPUFeature(TargetARM32Features::ARM32InstructionSet I) const { | 116 bool hasCPUFeature(TargetARM32Features::ARM32InstructionSet I) const { |
116 return CPUFeatures.hasFeature(I); | 117 return CPUFeatures.hasFeature(I); |
117 } | 118 } |
118 Operand *legalizeUndef(Operand *From, int32_t RegNum = Variable::NoRegister); | 119 Operand *legalizeUndef(Operand *From, int32_t RegNum = Variable::NoRegister); |
119 | 120 |
120 protected: | 121 protected: |
121 explicit TargetARM32(Cfg *Func); | 122 explicit TargetARM32(Cfg *Func); |
122 | 123 |
123 void postLower() override; | 124 void postLower() override; |
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559 | 560 |
560 private: | 561 private: |
561 ~TargetHeaderARM32() = default; | 562 ~TargetHeaderARM32() = default; |
562 | 563 |
563 TargetARM32Features CPUFeatures; | 564 TargetARM32Features CPUFeatures; |
564 }; | 565 }; |
565 | 566 |
566 } // end of namespace Ice | 567 } // end of namespace Ice |
567 | 568 |
568 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H | 569 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H |
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