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| 1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 3760 __ Bind(&done); | 3760 __ Bind(&done); |
| 3761 } | 3761 } |
| 3762 | 3762 |
| 3763 | 3763 |
| 3764 void LCodeGen::DoPower(LPower* instr) { | 3764 void LCodeGen::DoPower(LPower* instr) { |
| 3765 Representation exponent_type = instr->hydrogen()->right()->representation(); | 3765 Representation exponent_type = instr->hydrogen()->right()->representation(); |
| 3766 // Having marked this as a call, we can use any registers. | 3766 // Having marked this as a call, we can use any registers. |
| 3767 // Just make sure that the input/output registers are the expected ones. | 3767 // Just make sure that the input/output registers are the expected ones. |
| 3768 ASSERT(!instr->right()->IsDoubleRegister() || | 3768 ASSERT(!instr->right()->IsDoubleRegister() || |
| 3769 ToDoubleRegister(instr->right()).is(d1)); | 3769 ToDoubleRegister(instr->right()).is(d1)); |
| 3770 ASSERT(!instr->right()->IsRegister() || | 3770 ASSERT(exponent_type.IsInteger32() || !instr->right()->IsRegister() || |
| 3771 ToRegister(instr->right()).is(x11)); | 3771 ToRegister(instr->right()).is(x11)); |
| 3772 ASSERT(!exponent_type.IsInteger32() || ToRegister(instr->right()).is(x12)); |
| 3772 ASSERT(ToDoubleRegister(instr->left()).is(d0)); | 3773 ASSERT(ToDoubleRegister(instr->left()).is(d0)); |
| 3773 ASSERT(ToDoubleRegister(instr->result()).is(d0)); | 3774 ASSERT(ToDoubleRegister(instr->result()).is(d0)); |
| 3774 | 3775 |
| 3775 if (exponent_type.IsSmi()) { | 3776 if (exponent_type.IsSmi()) { |
| 3776 MathPowStub stub(MathPowStub::TAGGED); | 3777 MathPowStub stub(MathPowStub::TAGGED); |
| 3777 __ CallStub(&stub); | 3778 __ CallStub(&stub); |
| 3778 } else if (exponent_type.IsTagged()) { | 3779 } else if (exponent_type.IsTagged()) { |
| 3779 Label no_deopt; | 3780 Label no_deopt; |
| 3780 __ JumpIfSmi(x11, &no_deopt); | 3781 __ JumpIfSmi(x11, &no_deopt); |
| 3781 __ Ldr(x0, FieldMemOperand(x11, HeapObject::kMapOffset)); | 3782 __ Ldr(x0, FieldMemOperand(x11, HeapObject::kMapOffset)); |
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| 5459 __ Bind(&out_of_object); | 5460 __ Bind(&out_of_object); |
| 5460 __ Ldr(result, FieldMemOperand(object, JSObject::kPropertiesOffset)); | 5461 __ Ldr(result, FieldMemOperand(object, JSObject::kPropertiesOffset)); |
| 5461 // Index is equal to negated out of object property index plus 1. | 5462 // Index is equal to negated out of object property index plus 1. |
| 5462 __ Sub(result, result, Operand::UntagSmiAndScale(index, kPointerSizeLog2)); | 5463 __ Sub(result, result, Operand::UntagSmiAndScale(index, kPointerSizeLog2)); |
| 5463 __ Ldr(result, FieldMemOperand(result, | 5464 __ Ldr(result, FieldMemOperand(result, |
| 5464 FixedArray::kHeaderSize - kPointerSize)); | 5465 FixedArray::kHeaderSize - kPointerSize)); |
| 5465 __ Bind(&done); | 5466 __ Bind(&done); |
| 5466 } | 5467 } |
| 5467 | 5468 |
| 5468 } } // namespace v8::internal | 5469 } } // namespace v8::internal |
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