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1 ; This file checks that Subzero generates code in accordance with the | 1 ; This file checks that Subzero generates code in accordance with the |
2 ; calling convention for integers. | 2 ; calling convention for integers. |
3 | 3 |
4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ | 4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ |
5 ; RUN: --target x8632 -i %s --args -O2 \ | 5 ; RUN: --target x8632 -i %s --args -O2 \ |
6 ; RUN: | %if --need=target_X8632 --command FileCheck %s | 6 ; RUN: | %if --need=target_X8632 --command FileCheck %s |
7 | 7 |
8 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) | 8 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented) |
9 ; once enough infrastructure is in. Also, switch to --filetype=obj | 9 ; once enough infrastructure is in. Also, switch to --filetype=obj |
10 ; when possible. | 10 ; when possible. |
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176 define i64 @test_returning64_even_arg2(i64 %arg0, i32 %arg1, i64 %arg2) { | 176 define i64 @test_returning64_even_arg2(i64 %arg0, i32 %arg1, i64 %arg2) { |
177 entry: | 177 entry: |
178 ret i64 %arg2 | 178 ret i64 %arg2 |
179 } | 179 } |
180 ; Not padded out on x86-32. | 180 ; Not padded out on x86-32. |
181 ; CHECK-LABEL: test_returning64_even_arg2 | 181 ; CHECK-LABEL: test_returning64_even_arg2 |
182 ; CHECK-NEXT: mov {{.*}} [esp+0x10] | 182 ; CHECK-NEXT: mov {{.*}} [esp+0x10] |
183 ; CHECK-NEXT: mov {{.*}} [esp+0x14] | 183 ; CHECK-NEXT: mov {{.*}} [esp+0x14] |
184 ; CHECK: ret | 184 ; CHECK: ret |
185 ; ARM32-LABEL: test_returning64_even_arg2 | 185 ; ARM32-LABEL: test_returning64_even_arg2 |
186 ; ARM32-NEXT: ldr r0, [sp] | 186 ; ARM32-DAG: ldr r0, [sp] |
187 ; ARM32-NEXT: ldr r1, [sp, #4] | 187 ; ARM32-DAG: ldr r1, [sp, #4] |
188 ; ARM32-NEXT: bx lr | 188 ; ARM32-NEXT: bx lr |
189 | 189 |
190 define i64 @test_returning64_even_arg2b(i64 %arg0, i32 %arg1, i32 %arg1b, i64 %a
rg2) { | 190 define i64 @test_returning64_even_arg2b(i64 %arg0, i32 %arg1, i32 %arg1b, i64 %a
rg2) { |
191 entry: | 191 entry: |
192 ret i64 %arg2 | 192 ret i64 %arg2 |
193 } | 193 } |
194 ; CHECK-LABEL: test_returning64_even_arg2b | 194 ; CHECK-LABEL: test_returning64_even_arg2b |
195 ; CHECK-NEXT: mov {{.*}} [esp+0x14] | 195 ; CHECK-NEXT: mov {{.*}} [esp+0x14] |
196 ; CHECK-NEXT: mov {{.*}} [esp+0x18] | 196 ; CHECK-NEXT: mov {{.*}} [esp+0x18] |
197 ; CHECK: ret | 197 ; CHECK: ret |
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267 ; ARM32-DAG: mov [[REG1:.*]], r1 | 267 ; ARM32-DAG: mov [[REG1:.*]], r1 |
268 ; ARM32-DAG: mov [[REG2:.*]], r2 | 268 ; ARM32-DAG: mov [[REG2:.*]], r2 |
269 ; ARM32-DAG: mov [[REG3:.*]], r3 | 269 ; ARM32-DAG: mov [[REG3:.*]], r3 |
270 ; ARM32: str [[REG2]], [sp] | 270 ; ARM32: str [[REG2]], [sp] |
271 ; ARM32: str [[REG1]], [sp, #4] | 271 ; ARM32: str [[REG1]], [sp, #4] |
272 ; ARM32-DAG: mov r0 | 272 ; ARM32-DAG: mov r0 |
273 ; ARM32-DAG: mov r1 | 273 ; ARM32-DAG: mov r1 |
274 ; ARM32-DAG: mov r2 | 274 ; ARM32-DAG: mov r2 |
275 ; ARM32-DAG: mov r3, [[REG3]] | 275 ; ARM32-DAG: mov r3, [[REG3]] |
276 ; ARM32: bl | 276 ; ARM32: bl |
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