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Issue 1358193002: PPC: Fix "[turbofan] Add support for reinterpreting integers as floating point and vice versa." (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 2 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <assert.h> // For assert 5 #include <assert.h> // For assert
6 #include <limits.h> // For LONG_MIN, LONG_MAX. 6 #include <limits.h> // For LONG_MIN, LONG_MAX.
7 7
8 #if V8_TARGET_ARCH_PPC 8 #if V8_TARGET_ARCH_PPC
9 9
10 #include "src/base/bits.h" 10 #include "src/base/bits.h"
(...skipping 3731 matching lines...) Expand 10 before | Expand all | Expand 10 after
3742 #if V8_TARGET_ARCH_PPC64 3742 #if V8_TARGET_ARCH_PPC64
3743 ld(dst, MemOperand(sp, 0)); 3743 ld(dst, MemOperand(sp, 0));
3744 #else 3744 #else
3745 lwz(dst_hi, MemOperand(sp, Register::kExponentOffset)); 3745 lwz(dst_hi, MemOperand(sp, Register::kExponentOffset));
3746 lwz(dst, MemOperand(sp, Register::kMantissaOffset)); 3746 lwz(dst, MemOperand(sp, Register::kMantissaOffset));
3747 #endif 3747 #endif
3748 addi(sp, sp, Operand(kDoubleSize)); 3748 addi(sp, sp, Operand(kDoubleSize));
3749 } 3749 }
3750 3750
3751 3751
3752 void MacroAssembler::MovIntToFloat(DoubleRegister dst, Register src) {
3753 subi(sp, sp, Operand(kFloatSize));
3754 stw(src, MemOperand(sp, 0));
3755 nop(GROUP_ENDING_NOP); // LHS/RAW optimization
3756 lfs(dst, MemOperand(sp, 0));
3757 addi(sp, sp, Operand(kFloatSize));
3758 }
3759
3760
3761 void MacroAssembler::MovFloatToInt(Register dst, DoubleRegister src) {
3762 subi(sp, sp, Operand(kFloatSize));
3763 frsp(src, src);
3764 stfs(src, MemOperand(sp, 0));
3765 nop(GROUP_ENDING_NOP); // LHS/RAW optimization
3766 lwz(dst, MemOperand(sp, 0));
3767 addi(sp, sp, Operand(kFloatSize));
3768 }
3769
3770
3752 void MacroAssembler::Add(Register dst, Register src, intptr_t value, 3771 void MacroAssembler::Add(Register dst, Register src, intptr_t value,
3753 Register scratch) { 3772 Register scratch) {
3754 if (is_int16(value)) { 3773 if (is_int16(value)) {
3755 addi(dst, src, Operand(value)); 3774 addi(dst, src, Operand(value));
3756 } else { 3775 } else {
3757 mov(scratch, Operand(value)); 3776 mov(scratch, Operand(value));
3758 add(dst, src, scratch); 3777 add(dst, src, scratch);
3759 } 3778 }
3760 } 3779 }
3761 3780
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4356 } 4375 }
4357 if (mag.shift > 0) srawi(result, result, mag.shift); 4376 if (mag.shift > 0) srawi(result, result, mag.shift);
4358 ExtractBit(r0, dividend, 31); 4377 ExtractBit(r0, dividend, 31);
4359 add(result, result, r0); 4378 add(result, result, r0);
4360 } 4379 }
4361 4380
4362 } // namespace internal 4381 } // namespace internal
4363 } // namespace v8 4382 } // namespace v8
4364 4383
4365 #endif // V8_TARGET_ARCH_PPC 4384 #endif // V8_TARGET_ARCH_PPC
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