| Index: src/compiler/mips64/instruction-selector-mips64.cc
|
| diff --git a/src/compiler/mips64/instruction-selector-mips64.cc b/src/compiler/mips64/instruction-selector-mips64.cc
|
| index 09c3411e196b93146805e5d0e485ed90728eae7e..d20c1c72f66a162b231b09f16bc07a78d9b6be50 100644
|
| --- a/src/compiler/mips64/instruction-selector-mips64.cc
|
| +++ b/src/compiler/mips64/instruction-selector-mips64.cc
|
| @@ -578,6 +578,29 @@ void InstructionSelector::VisitTruncateFloat64ToInt32(Node* node) {
|
| }
|
|
|
|
|
| +void InstructionSelector::VisitBitcastFloat32ToInt32(Node* node) {
|
| + VisitRR(this, kMips64Float64ExtractLowWord32, node);
|
| +}
|
| +
|
| +
|
| +void InstructionSelector::VisitBitcastFloat64ToInt64(Node* node) {
|
| + VisitRR(this, kMips64BitcastDL, node);
|
| +}
|
| +
|
| +
|
| +void InstructionSelector::VisitBitcastInt32ToFloat32(Node* node) {
|
| + Mips64OperandGenerator g(this);
|
| + Emit(kMips64Float64InsertLowWord32, g.DefineAsRegister(node),
|
| + ImmediateOperand(ImmediateOperand::INLINE, 0),
|
| + g.UseRegister(node->InputAt(0)));
|
| +}
|
| +
|
| +
|
| +void InstructionSelector::VisitBitcastInt64ToFloat64(Node* node) {
|
| + VisitRR(this, kMips64BitcastLD, node);
|
| +}
|
| +
|
| +
|
| void InstructionSelector::VisitFloat32Add(Node* node) {
|
| VisitRRR(this, kMips64AddS, node);
|
| }
|
| @@ -1331,16 +1354,12 @@ void InstructionSelector::VisitFloat64LessThanOrEqual(Node* node) {
|
|
|
|
|
| void InstructionSelector::VisitFloat64ExtractLowWord32(Node* node) {
|
| - Mips64OperandGenerator g(this);
|
| - Emit(kMips64Float64ExtractLowWord32, g.DefineAsRegister(node),
|
| - g.UseRegister(node->InputAt(0)));
|
| + VisitRR(this, kMips64Float64ExtractLowWord32, node);
|
| }
|
|
|
|
|
| void InstructionSelector::VisitFloat64ExtractHighWord32(Node* node) {
|
| - Mips64OperandGenerator g(this);
|
| - Emit(kMips64Float64ExtractHighWord32, g.DefineAsRegister(node),
|
| - g.UseRegister(node->InputAt(0)));
|
| + VisitRR(this, kMips64Float64ExtractHighWord32, node);
|
| }
|
|
|
|
|
|
|