Chromium Code Reviews Chromium Code Reviews
Issue 1356763004:
Subzero. ARM32 Fcmp lowering. (Closed)
Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master| OLD | NEW |
|---|---|
| 1 //===- subzero/src/IceTargetLoweringARM32.def - ARM32 X-macros --*- C++ -*-===// | 1 //===- subzero/src/IceTargetLoweringARM32.def - ARM32 X-macros --*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 // This file defines certain patterns for lowering to ARM32 target | 10 // This file defines certain patterns for lowering to ARM32 target |
| 11 // instructions, in the form of x-macros. | 11 // instructions, in the form of x-macros. |
| 12 // | 12 // |
| 13 //===----------------------------------------------------------------------===// | 13 //===----------------------------------------------------------------------===// |
| 14 | 14 |
| 15 #ifndef SUBZERO_SRC_ICETARGETLOWERINGARM32_DEF | 15 #ifndef SUBZERO_SRC_ICETARGETLOWERINGARM32_DEF |
| 16 #define SUBZERO_SRC_ICETARGETLOWERINGARM32_DEF | 16 #define SUBZERO_SRC_ICETARGETLOWERINGARM32_DEF |
| 17 | 17 |
| 18 // Patterns for lowering fcmp. These are expected to be used in the following | |
| 19 // manner: | |
| 20 // | |
| 21 // mov reg, #0 | |
| 22 // movCC0 reg, #1 /* only if CC0 != kNone */ | |
| 23 // movCC1 reg, #1 /* only if CC1 != kNone */ | |
| 24 // | |
| 25 // TODO(jpp): vector lowerings. | |
| 26 #define FCMPARM32_TABLE \ | |
|
Jim Stichnoth
2015/09/18 19:28:55
Can you align all the continuation backslashes at
John
2015/09/18 22:55:53
Done.
| |
| 27 /* val, CC0, CC1 */ \ | |
| 28 X(False, kNone, kNone) \ | |
| 29 X(Oeq, EQ, kNone) \ | |
| 30 X(Ogt, GT, kNone) \ | |
| 31 X(Oge, GE, kNone) \ | |
| 32 X(Olt, MI, kNone) \ | |
| 33 X(Ole, LS, kNone) \ | |
| 34 X(One, MI, GT) \ | |
| 35 X(Ord, VC, kNone) \ | |
| 36 X(Ueq, EQ, VS) \ | |
| 37 X(Ugt, HI, kNone) \ | |
| 38 X(Uge, PL, kNone) \ | |
| 39 X(Ult, LT, kNone) \ | |
| 40 X(Ule, LE, kNone) \ | |
| 41 X(Une, NE, kNone) \ | |
| 42 X(Uno, VS, kNone) \ | |
| 43 X(True, AL, kNone) \ | |
| 44 //#define X(val, CC0, CC1) | |
| 45 | |
| 18 // Patterns for lowering icmp. | 46 // Patterns for lowering icmp. |
| 19 #define ICMPARM32_TABLE \ | 47 #define ICMPARM32_TABLE \ |
| 20 /* val, is_signed, swapped64, C_32, C1_64, C2_64 */ \ | 48 /* val, is_signed, swapped64, C_32, C1_64, C2_64 */ \ |
| 21 X(Eq, false, false, EQ, EQ, NE) \ | 49 X(Eq, false, false, EQ, EQ, NE) \ |
| 22 X(Ne, false, false, NE, NE, EQ) \ | 50 X(Ne, false, false, NE, NE, EQ) \ |
| 23 X(Ugt, false, false, HI, HI, LS) \ | 51 X(Ugt, false, false, HI, HI, LS) \ |
| 24 X(Uge, false, false, CS, CS, CC) \ | 52 X(Uge, false, false, CS, CS, CC) \ |
| 25 X(Ult, false, false, CC, CC, CS) \ | 53 X(Ult, false, false, CC, CC, CS) \ |
| 26 X(Ule, false, false, LS, LS, HI) \ | 54 X(Ule, false, false, LS, LS, HI) \ |
| 27 X(Sgt, true, true, GT, LT, GE) \ | 55 X(Sgt, true, true, GT, LT, GE) \ |
| 28 X(Sge, true, false, GE, GE, LT) \ | 56 X(Sge, true, false, GE, GE, LT) \ |
| 29 X(Slt, true, false, LT, LT, GE) \ | 57 X(Slt, true, false, LT, LT, GE) \ |
| 30 X(Sle, true, true, LE, GE, LT) \ | 58 X(Sle, true, true, LE, GE, LT) \ |
| 31 //#define X(val, is_signed, swapped64, C_32, C1_64, C2_64) | 59 //#define X(val, is_signed, swapped64, C_32, C1_64, C2_64) |
| 32 | 60 |
| 33 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_DEF | 61 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_DEF |
| OLD | NEW |
