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Issue 13560007: Remove ARM support for soft float (pre-VFP2) (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: tweaks Created 7 years, 8 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 273 matching lines...) Expand 10 before | Expand all | Expand 10 after
284 284
285 285
286 void MacroAssembler::Move(Register dst, Register src, Condition cond) { 286 void MacroAssembler::Move(Register dst, Register src, Condition cond) {
287 if (!dst.is(src)) { 287 if (!dst.is(src)) {
288 mov(dst, src, LeaveCC, cond); 288 mov(dst, src, LeaveCC, cond);
289 } 289 }
290 } 290 }
291 291
292 292
293 void MacroAssembler::Move(DwVfpRegister dst, DwVfpRegister src) { 293 void MacroAssembler::Move(DwVfpRegister dst, DwVfpRegister src) {
294 ASSERT(CpuFeatures::IsSupported(VFP2));
295 CpuFeatureScope scope(this, VFP2);
296 if (!dst.is(src)) { 294 if (!dst.is(src)) {
297 vmov(dst, src); 295 vmov(dst, src);
298 } 296 }
299 } 297 }
300 298
301 299
302 void MacroAssembler::And(Register dst, Register src1, const Operand& src2, 300 void MacroAssembler::And(Register dst, Register src1, const Operand& src2,
303 Condition cond) { 301 Condition cond) {
304 if (!src2.is_reg() && 302 if (!src2.is_reg() &&
305 !src2.must_output_reloc_info(this) && 303 !src2.must_output_reloc_info(this) &&
(...skipping 498 matching lines...) Expand 10 before | Expand all | Expand 10 after
804 const Register fpscr_flags, 802 const Register fpscr_flags,
805 const Condition cond) { 803 const Condition cond) {
806 // Compare and load FPSCR. 804 // Compare and load FPSCR.
807 vcmp(src1, src2, cond); 805 vcmp(src1, src2, cond);
808 vmrs(fpscr_flags, cond); 806 vmrs(fpscr_flags, cond);
809 } 807 }
810 808
811 void MacroAssembler::Vmov(const DwVfpRegister dst, 809 void MacroAssembler::Vmov(const DwVfpRegister dst,
812 const double imm, 810 const double imm,
813 const Register scratch) { 811 const Register scratch) {
814 ASSERT(IsEnabled(VFP2));
815 static const DoubleRepresentation minus_zero(-0.0); 812 static const DoubleRepresentation minus_zero(-0.0);
816 static const DoubleRepresentation zero(0.0); 813 static const DoubleRepresentation zero(0.0);
817 DoubleRepresentation value(imm); 814 DoubleRepresentation value(imm);
818 // Handle special values first. 815 // Handle special values first.
819 if (value.bits == zero.bits) { 816 if (value.bits == zero.bits) {
820 vmov(dst, kDoubleRegZero); 817 vmov(dst, kDoubleRegZero);
821 } else if (value.bits == minus_zero.bits) { 818 } else if (value.bits == minus_zero.bits) {
822 vneg(dst, kDoubleRegZero); 819 vneg(dst, kDoubleRegZero);
823 } else { 820 } else {
824 vmov(dst, imm, scratch); 821 vmov(dst, imm, scratch);
(...skipping 41 matching lines...) Expand 10 before | Expand all | Expand 10 after
866 str(ip, MemOperand(fp, ExitFrameConstants::kCodeOffset)); 863 str(ip, MemOperand(fp, ExitFrameConstants::kCodeOffset));
867 864
868 // Save the frame pointer and the context in top. 865 // Save the frame pointer and the context in top.
869 mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate()))); 866 mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
870 str(fp, MemOperand(ip)); 867 str(fp, MemOperand(ip));
871 mov(ip, Operand(ExternalReference(Isolate::kContextAddress, isolate()))); 868 mov(ip, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
872 str(cp, MemOperand(ip)); 869 str(cp, MemOperand(ip));
873 870
874 // Optionally save all double registers. 871 // Optionally save all double registers.
875 if (save_doubles) { 872 if (save_doubles) {
876 CpuFeatureScope scope(this, VFP2);
877 // Check CPU flags for number of registers, setting the Z condition flag. 873 // Check CPU flags for number of registers, setting the Z condition flag.
878 CheckFor32DRegs(ip); 874 CheckFor32DRegs(ip);
879 875
880 // Push registers d0-d15, and possibly d16-d31, on the stack. 876 // Push registers d0-d15, and possibly d16-d31, on the stack.
881 // If d16-d31 are not pushed, decrease the stack pointer instead. 877 // If d16-d31 are not pushed, decrease the stack pointer instead.
882 vstm(db_w, sp, d16, d31, ne); 878 vstm(db_w, sp, d16, d31, ne);
883 sub(sp, sp, Operand(16 * kDoubleSize), LeaveCC, eq); 879 sub(sp, sp, Operand(16 * kDoubleSize), LeaveCC, eq);
884 vstm(db_w, sp, d0, d15); 880 vstm(db_w, sp, d0, d15);
885 // Note that d0 will be accessible at 881 // Note that d0 will be accessible at
886 // fp - 2 * kPointerSize - DwVfpRegister::kMaxNumRegisters * kDoubleSize, 882 // fp - 2 * kPointerSize - DwVfpRegister::kMaxNumRegisters * kDoubleSize,
(...skipping 44 matching lines...) Expand 10 before | Expand all | Expand 10 after
931 // flag. 927 // flag.
932 return FLAG_sim_stack_alignment; 928 return FLAG_sim_stack_alignment;
933 #endif // defined(V8_HOST_ARCH_ARM) 929 #endif // defined(V8_HOST_ARCH_ARM)
934 } 930 }
935 931
936 932
937 void MacroAssembler::LeaveExitFrame(bool save_doubles, 933 void MacroAssembler::LeaveExitFrame(bool save_doubles,
938 Register argument_count) { 934 Register argument_count) {
939 // Optionally restore all double registers. 935 // Optionally restore all double registers.
940 if (save_doubles) { 936 if (save_doubles) {
941 CpuFeatureScope scope(this, VFP2);
942 // Calculate the stack location of the saved doubles and restore them. 937 // Calculate the stack location of the saved doubles and restore them.
943 const int offset = 2 * kPointerSize; 938 const int offset = 2 * kPointerSize;
944 sub(r3, fp, 939 sub(r3, fp,
945 Operand(offset + DwVfpRegister::kMaxNumRegisters * kDoubleSize)); 940 Operand(offset + DwVfpRegister::kMaxNumRegisters * kDoubleSize));
946 941
947 // Check CPU flags for number of registers, setting the Z condition flag. 942 // Check CPU flags for number of registers, setting the Z condition flag.
948 CheckFor32DRegs(ip); 943 CheckFor32DRegs(ip);
949 944
950 // Pop registers d0-d15, and possibly d16-d31, from r3. 945 // Pop registers d0-d15, and possibly d16-d31, from r3.
951 // If d16-d31 are not popped, increase r3 instead. 946 // If d16-d31 are not popped, increase r3 instead.
(...skipping 16 matching lines...) Expand all
968 963
969 // Tear down the exit frame, pop the arguments, and return. 964 // Tear down the exit frame, pop the arguments, and return.
970 mov(sp, Operand(fp)); 965 mov(sp, Operand(fp));
971 ldm(ia_w, sp, fp.bit() | lr.bit()); 966 ldm(ia_w, sp, fp.bit() | lr.bit());
972 if (argument_count.is_valid()) { 967 if (argument_count.is_valid()) {
973 add(sp, sp, Operand(argument_count, LSL, kPointerSizeLog2)); 968 add(sp, sp, Operand(argument_count, LSL, kPointerSizeLog2));
974 } 969 }
975 } 970 }
976 971
977 void MacroAssembler::GetCFunctionDoubleResult(const DwVfpRegister dst) { 972 void MacroAssembler::GetCFunctionDoubleResult(const DwVfpRegister dst) {
978 ASSERT(CpuFeatures::IsSupported(VFP2));
979 if (use_eabi_hardfloat()) { 973 if (use_eabi_hardfloat()) {
980 Move(dst, d0); 974 Move(dst, d0);
981 } else { 975 } else {
982 vmov(dst, r0, r1); 976 vmov(dst, r0, r1);
983 } 977 }
984 } 978 }
985 979
986 980
987 void MacroAssembler::SetCallKind(Register dst, CallKind call_kind) { 981 void MacroAssembler::SetCallKind(Register dst, CallKind call_kind) {
988 // This macro takes the dst register to make the code more readable 982 // This macro takes the dst register to make the code more readable
(...skipping 1052 matching lines...) Expand 10 before | Expand all | Expand 10 after
2041 2035
2042 bind(&smi_value); 2036 bind(&smi_value);
2043 add(scratch1, elements_reg, 2037 add(scratch1, elements_reg,
2044 Operand(FixedDoubleArray::kHeaderSize - kHeapObjectTag - 2038 Operand(FixedDoubleArray::kHeaderSize - kHeapObjectTag -
2045 elements_offset)); 2039 elements_offset));
2046 add(scratch1, scratch1, 2040 add(scratch1, scratch1,
2047 Operand(key_reg, LSL, kDoubleSizeLog2 - kSmiTagSize)); 2041 Operand(key_reg, LSL, kDoubleSizeLog2 - kSmiTagSize));
2048 // scratch1 is now effective address of the double element 2042 // scratch1 is now effective address of the double element
2049 2043
2050 FloatingPointHelper::Destination destination; 2044 FloatingPointHelper::Destination destination;
2051 if (CpuFeatures::IsSupported(VFP2)) { 2045 destination = FloatingPointHelper::kVFPRegisters;
2052 destination = FloatingPointHelper::kVFPRegisters;
2053 } else {
2054 destination = FloatingPointHelper::kCoreRegisters;
2055 }
2056 2046
2057 Register untagged_value = elements_reg; 2047 Register untagged_value = elements_reg;
2058 SmiUntag(untagged_value, value_reg); 2048 SmiUntag(untagged_value, value_reg);
2059 FloatingPointHelper::ConvertIntToDouble(this, 2049 FloatingPointHelper::ConvertIntToDouble(this,
2060 untagged_value, 2050 untagged_value,
2061 destination, 2051 destination,
2062 d0, 2052 d0,
2063 mantissa_reg, 2053 mantissa_reg,
2064 exponent_reg, 2054 exponent_reg,
2065 scratch4, 2055 scratch4,
2066 s2); 2056 s2);
2067 if (destination == FloatingPointHelper::kVFPRegisters) { 2057 if (destination == FloatingPointHelper::kVFPRegisters) {
2068 CpuFeatureScope scope(this, VFP2);
2069 vstr(d0, scratch1, 0); 2058 vstr(d0, scratch1, 0);
2070 } else { 2059 } else {
2071 str(mantissa_reg, MemOperand(scratch1, 0)); 2060 str(mantissa_reg, MemOperand(scratch1, 0));
2072 str(exponent_reg, MemOperand(scratch1, Register::kSizeInBytes)); 2061 str(exponent_reg, MemOperand(scratch1, Register::kSizeInBytes));
2073 } 2062 }
2074 bind(&done); 2063 bind(&done);
2075 } 2064 }
2076 2065
2077 2066
2078 void MacroAssembler::CompareMap(Register obj, 2067 void MacroAssembler::CompareMap(Register obj,
(...skipping 339 matching lines...) Expand 10 before | Expand all | Expand 10 after
2418 SwVfpRegister scratch2) { 2407 SwVfpRegister scratch2) {
2419 mov(scratch1, Operand(smi, ASR, kSmiTagSize)); 2408 mov(scratch1, Operand(smi, ASR, kSmiTagSize));
2420 vmov(scratch2, scratch1); 2409 vmov(scratch2, scratch1);
2421 vcvt_f64_s32(value, scratch2); 2410 vcvt_f64_s32(value, scratch2);
2422 } 2411 }
2423 2412
2424 2413
2425 void MacroAssembler::TestDoubleIsInt32(DwVfpRegister double_input, 2414 void MacroAssembler::TestDoubleIsInt32(DwVfpRegister double_input,
2426 DwVfpRegister double_scratch) { 2415 DwVfpRegister double_scratch) {
2427 ASSERT(!double_input.is(double_scratch)); 2416 ASSERT(!double_input.is(double_scratch));
2428 ASSERT(CpuFeatures::IsSupported(VFP2));
2429 CpuFeatureScope scope(this, VFP2);
2430
2431 vcvt_s32_f64(double_scratch.low(), double_input); 2417 vcvt_s32_f64(double_scratch.low(), double_input);
2432 vcvt_f64_s32(double_scratch, double_scratch.low()); 2418 vcvt_f64_s32(double_scratch, double_scratch.low());
2433 VFPCompareAndSetFlags(double_input, double_scratch); 2419 VFPCompareAndSetFlags(double_input, double_scratch);
2434 } 2420 }
2435 2421
2436 2422
2437 void MacroAssembler::TryDoubleToInt32Exact(Register result, 2423 void MacroAssembler::TryDoubleToInt32Exact(Register result,
2438 DwVfpRegister double_input, 2424 DwVfpRegister double_input,
2439 DwVfpRegister double_scratch) { 2425 DwVfpRegister double_scratch) {
2440 ASSERT(!double_input.is(double_scratch)); 2426 ASSERT(!double_input.is(double_scratch));
2441 ASSERT(CpuFeatures::IsSupported(VFP2));
2442 CpuFeatureScope scope(this, VFP2);
2443
2444 vcvt_s32_f64(double_scratch.low(), double_input); 2427 vcvt_s32_f64(double_scratch.low(), double_input);
2445 vmov(result, double_scratch.low()); 2428 vmov(result, double_scratch.low());
2446 vcvt_f64_s32(double_scratch, double_scratch.low()); 2429 vcvt_f64_s32(double_scratch, double_scratch.low());
2447 VFPCompareAndSetFlags(double_input, double_scratch); 2430 VFPCompareAndSetFlags(double_input, double_scratch);
2448 } 2431 }
2449 2432
2450 2433
2451 void MacroAssembler::TryInt32Floor(Register result, 2434 void MacroAssembler::TryInt32Floor(Register result,
2452 DwVfpRegister double_input, 2435 DwVfpRegister double_input,
2453 Register input_high, 2436 Register input_high,
2454 DwVfpRegister double_scratch, 2437 DwVfpRegister double_scratch,
2455 Label* done, 2438 Label* done,
2456 Label* exact) { 2439 Label* exact) {
2457 ASSERT(!result.is(input_high)); 2440 ASSERT(!result.is(input_high));
2458 ASSERT(!double_input.is(double_scratch)); 2441 ASSERT(!double_input.is(double_scratch));
2459 ASSERT(CpuFeatures::IsSupported(VFP2));
2460 CpuFeatureScope scope(this, VFP2);
2461 Label negative, exception; 2442 Label negative, exception;
2462 2443
2463 // Test for NaN and infinities. 2444 // Test for NaN and infinities.
2464 Sbfx(result, input_high, 2445 Sbfx(result, input_high,
2465 HeapNumber::kExponentShift, HeapNumber::kExponentBits); 2446 HeapNumber::kExponentShift, HeapNumber::kExponentBits);
2466 cmp(result, Operand(-1)); 2447 cmp(result, Operand(-1));
2467 b(eq, &exception); 2448 b(eq, &exception);
2468 // Test for values that can be exactly represented as a 2449 // Test for values that can be exactly represented as a
2469 // signed 32-bit integer. 2450 // signed 32-bit integer.
2470 TryDoubleToInt32Exact(result, double_input, double_scratch); 2451 TryDoubleToInt32Exact(result, double_input, double_scratch);
(...skipping 24 matching lines...) Expand all
2495 } 2476 }
2496 2477
2497 2478
2498 void MacroAssembler::ECMAConvertNumberToInt32(Register source, 2479 void MacroAssembler::ECMAConvertNumberToInt32(Register source,
2499 Register result, 2480 Register result,
2500 Register input_low, 2481 Register input_low,
2501 Register input_high, 2482 Register input_high,
2502 Register scratch, 2483 Register scratch,
2503 DwVfpRegister double_scratch1, 2484 DwVfpRegister double_scratch1,
2504 DwVfpRegister double_scratch2) { 2485 DwVfpRegister double_scratch2) {
2505 if (CpuFeatures::IsSupported(VFP2)) { 2486 vldr(double_scratch1, FieldMemOperand(source, HeapNumber::kValueOffset));
2506 CpuFeatureScope scope(this, VFP2); 2487 ECMAToInt32VFP(result, double_scratch1, double_scratch2,
2507 vldr(double_scratch1, FieldMemOperand(source, HeapNumber::kValueOffset)); 2488 scratch, input_high, input_low);
2508 ECMAToInt32VFP(result, double_scratch1, double_scratch2,
2509 scratch, input_high, input_low);
2510 } else {
2511 Ldrd(input_low, input_high,
2512 FieldMemOperand(source, HeapNumber::kValueOffset));
2513 ECMAToInt32NoVFP(result, scratch, input_high, input_low);
2514 }
2515 } 2489 }
2516 2490
2517 2491
2518 void MacroAssembler::ECMAToInt32VFP(Register result, 2492 void MacroAssembler::ECMAToInt32VFP(Register result,
2519 DwVfpRegister double_input, 2493 DwVfpRegister double_input,
2520 DwVfpRegister double_scratch, 2494 DwVfpRegister double_scratch,
2521 Register scratch, 2495 Register scratch,
2522 Register input_high, 2496 Register input_high,
2523 Register input_low) { 2497 Register input_low) {
2524 CpuFeatureScope scope(this, VFP2);
2525 ASSERT(!input_high.is(result)); 2498 ASSERT(!input_high.is(result));
2526 ASSERT(!input_low.is(result)); 2499 ASSERT(!input_low.is(result));
2527 ASSERT(!input_low.is(input_high)); 2500 ASSERT(!input_low.is(input_high));
2528 ASSERT(!scratch.is(result) && 2501 ASSERT(!scratch.is(result) &&
2529 !scratch.is(input_high) && 2502 !scratch.is(input_high) &&
2530 !scratch.is(input_low)); 2503 !scratch.is(input_low));
2531 ASSERT(!double_input.is(double_scratch)); 2504 ASSERT(!double_input.is(double_scratch));
2532 2505
2533 Label out_of_range, negate, done; 2506 Label out_of_range, negate, done;
2534 2507
(...skipping 19 matching lines...) Expand all
2554 b(ge, &out_of_range); 2527 b(ge, &out_of_range);
2555 2528
2556 // If we reach this code, 31 <= exponent <= 83. 2529 // If we reach this code, 31 <= exponent <= 83.
2557 // So, we don't have to handle cases where 0 <= exponent <= 20 for 2530 // So, we don't have to handle cases where 0 <= exponent <= 20 for
2558 // which we would need to shift right the high part of the mantissa. 2531 // which we would need to shift right the high part of the mantissa.
2559 ECMAToInt32Tail(result, scratch, input_high, input_low, 2532 ECMAToInt32Tail(result, scratch, input_high, input_low,
2560 &out_of_range, &negate, &done); 2533 &out_of_range, &negate, &done);
2561 } 2534 }
2562 2535
2563 2536
2564 void MacroAssembler::ECMAToInt32NoVFP(Register result, 2537 void MacroAssembler::ECMAToInt32NoVFP(Register result,
Rodolph Perfetta 2013/04/04 15:30:04 This should be removed too.
danno 2013/04/08 19:45:33 Done.
2565 Register scratch, 2538 Register scratch,
2566 Register input_high, 2539 Register input_high,
2567 Register input_low) { 2540 Register input_low) {
2568 ASSERT(!result.is(scratch)); 2541 ASSERT(!result.is(scratch));
2569 ASSERT(!result.is(input_high)); 2542 ASSERT(!result.is(input_high));
2570 ASSERT(!result.is(input_low)); 2543 ASSERT(!result.is(input_low));
2571 ASSERT(!scratch.is(input_high)); 2544 ASSERT(!scratch.is(input_high));
2572 ASSERT(!scratch.is(input_low)); 2545 ASSERT(!scratch.is(input_low));
2573 ASSERT(!input_high.is(input_low)); 2546 ASSERT(!input_high.is(input_low));
2574 2547
(...skipping 133 matching lines...) Expand 10 before | Expand all | Expand 10 after
2708 2681
2709 void MacroAssembler::CallRuntime(Runtime::FunctionId fid, int num_arguments) { 2682 void MacroAssembler::CallRuntime(Runtime::FunctionId fid, int num_arguments) {
2710 CallRuntime(Runtime::FunctionForId(fid), num_arguments); 2683 CallRuntime(Runtime::FunctionForId(fid), num_arguments);
2711 } 2684 }
2712 2685
2713 2686
2714 void MacroAssembler::CallRuntimeSaveDoubles(Runtime::FunctionId id) { 2687 void MacroAssembler::CallRuntimeSaveDoubles(Runtime::FunctionId id) {
2715 const Runtime::Function* function = Runtime::FunctionForId(id); 2688 const Runtime::Function* function = Runtime::FunctionForId(id);
2716 mov(r0, Operand(function->nargs)); 2689 mov(r0, Operand(function->nargs));
2717 mov(r1, Operand(ExternalReference(function, isolate()))); 2690 mov(r1, Operand(ExternalReference(function, isolate())));
2718 SaveFPRegsMode mode = CpuFeatures::IsSupported(VFP2) 2691 CEntryStub stub(1, kSaveFPRegs);
2719 ? kSaveFPRegs
2720 : kDontSaveFPRegs;
2721 CEntryStub stub(1, mode);
2722 CallStub(&stub); 2692 CallStub(&stub);
2723 } 2693 }
2724 2694
2725 2695
2726 void MacroAssembler::CallExternalReference(const ExternalReference& ext, 2696 void MacroAssembler::CallExternalReference(const ExternalReference& ext,
2727 int num_arguments) { 2697 int num_arguments) {
2728 mov(r0, Operand(num_arguments)); 2698 mov(r0, Operand(num_arguments));
2729 mov(r1, Operand(ext)); 2699 mov(r1, Operand(ext));
2730 2700
2731 CEntryStub stub(1); 2701 CEntryStub stub(1);
(...skipping 724 matching lines...) Expand 10 before | Expand all | Expand 10 after
3456 } 3426 }
3457 3427
3458 3428
3459 void MacroAssembler::PrepareCallCFunction(int num_reg_arguments, 3429 void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,
3460 Register scratch) { 3430 Register scratch) {
3461 PrepareCallCFunction(num_reg_arguments, 0, scratch); 3431 PrepareCallCFunction(num_reg_arguments, 0, scratch);
3462 } 3432 }
3463 3433
3464 3434
3465 void MacroAssembler::SetCallCDoubleArguments(DwVfpRegister dreg) { 3435 void MacroAssembler::SetCallCDoubleArguments(DwVfpRegister dreg) {
3466 ASSERT(CpuFeatures::IsSupported(VFP2));
3467 if (use_eabi_hardfloat()) { 3436 if (use_eabi_hardfloat()) {
3468 Move(d0, dreg); 3437 Move(d0, dreg);
3469 } else { 3438 } else {
3470 vmov(r0, r1, dreg); 3439 vmov(r0, r1, dreg);
3471 } 3440 }
3472 } 3441 }
3473 3442
3474 3443
3475 void MacroAssembler::SetCallCDoubleArguments(DwVfpRegister dreg1, 3444 void MacroAssembler::SetCallCDoubleArguments(DwVfpRegister dreg1,
3476 DwVfpRegister dreg2) { 3445 DwVfpRegister dreg2) {
3477 ASSERT(CpuFeatures::IsSupported(VFP2));
3478 if (use_eabi_hardfloat()) { 3446 if (use_eabi_hardfloat()) {
3479 if (dreg2.is(d0)) { 3447 if (dreg2.is(d0)) {
3480 ASSERT(!dreg1.is(d1)); 3448 ASSERT(!dreg1.is(d1));
3481 Move(d1, dreg2); 3449 Move(d1, dreg2);
3482 Move(d0, dreg1); 3450 Move(d0, dreg1);
3483 } else { 3451 } else {
3484 Move(d0, dreg1); 3452 Move(d0, dreg1);
3485 Move(d1, dreg2); 3453 Move(d1, dreg2);
3486 } 3454 }
3487 } else { 3455 } else {
3488 vmov(r0, r1, dreg1); 3456 vmov(r0, r1, dreg1);
3489 vmov(r2, r3, dreg2); 3457 vmov(r2, r3, dreg2);
3490 } 3458 }
3491 } 3459 }
3492 3460
3493 3461
3494 void MacroAssembler::SetCallCDoubleArguments(DwVfpRegister dreg, 3462 void MacroAssembler::SetCallCDoubleArguments(DwVfpRegister dreg,
3495 Register reg) { 3463 Register reg) {
3496 ASSERT(CpuFeatures::IsSupported(VFP2));
3497 if (use_eabi_hardfloat()) { 3464 if (use_eabi_hardfloat()) {
3498 Move(d0, dreg); 3465 Move(d0, dreg);
3499 Move(r0, reg); 3466 Move(r0, reg);
3500 } else { 3467 } else {
3501 Move(r2, reg); 3468 Move(r2, reg);
3502 vmov(r0, r1, dreg); 3469 vmov(r0, r1, dreg);
3503 } 3470 }
3504 } 3471 }
3505 3472
3506 3473
(...skipping 442 matching lines...) Expand 10 before | Expand all | Expand 10 after
3949 void CodePatcher::EmitCondition(Condition cond) { 3916 void CodePatcher::EmitCondition(Condition cond) {
3950 Instr instr = Assembler::instr_at(masm_.pc_); 3917 Instr instr = Assembler::instr_at(masm_.pc_);
3951 instr = (instr & ~kCondMask) | cond; 3918 instr = (instr & ~kCondMask) | cond;
3952 masm_.emit(instr); 3919 masm_.emit(instr);
3953 } 3920 }
3954 3921
3955 3922
3956 } } // namespace v8::internal 3923 } } // namespace v8::internal
3957 3924
3958 #endif // V8_TARGET_ARCH_ARM 3925 #endif // V8_TARGET_ARCH_ARM
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