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Issue 13560007: Remove ARM support for soft float (pre-VFP2) (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Review feedback Created 7 years, 8 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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962 Register result, 962 Register result,
963 Register input_low, 963 Register input_low,
964 Register input_high, 964 Register input_high,
965 Register scratch, 965 Register scratch,
966 DwVfpRegister double_scratch1, 966 DwVfpRegister double_scratch1,
967 DwVfpRegister double_scratch2); 967 DwVfpRegister double_scratch2);
968 968
969 // Performs a truncating conversion of a floating point number as used by 969 // Performs a truncating conversion of a floating point number as used by
970 // the JS bitwise operations. See ECMA-262 9.5: ToInt32. 970 // the JS bitwise operations. See ECMA-262 9.5: ToInt32.
971 // Exits with 'result' holding the answer and all other registers clobbered. 971 // Exits with 'result' holding the answer and all other registers clobbered.
972 void ECMAToInt32VFP(Register result, 972 void ECMAToInt32(Register result,
973 DwVfpRegister double_input, 973 DwVfpRegister double_input,
974 DwVfpRegister double_scratch, 974 DwVfpRegister double_scratch,
975 Register scratch, 975 Register scratch,
976 Register input_high, 976 Register input_high,
977 Register input_low); 977 Register input_low);
978
979 // Performs a truncating conversion of a floating point number as used by
980 // the JS bitwise operations. See ECMA-262 9.5: ToInt32.
981 // Exits with 'result' holding the answer.
982 void ECMAToInt32NoVFP(Register result,
983 Register scratch,
984 Register input_high,
985 Register input_low);
986 978
987 // Count leading zeros in a 32 bit word. On ARM5 and later it uses the clz 979 // Count leading zeros in a 32 bit word. On ARM5 and later it uses the clz
988 // instruction. On pre-ARM5 hardware this routine gives the wrong answer 980 // instruction. On pre-ARM5 hardware this routine gives the wrong answer
989 // for 0 (31 instead of 32). Source and scratch can be the same in which case 981 // for 0 (31 instead of 32). Source and scratch can be the same in which case
990 // the source is clobbered. Source and zeros can also be the same in which 982 // the source is clobbered. Source and zeros can also be the same in which
991 // case scratch should be a different register. 983 // case scratch should be a different register.
992 void CountLeadingZeros(Register zeros, 984 void CountLeadingZeros(Register zeros,
993 Register source, 985 Register source,
994 Register scratch); 986 Register scratch);
995 987
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1439 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 1431 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1440 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 1432 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1441 #else 1433 #else
1442 #define ACCESS_MASM(masm) masm-> 1434 #define ACCESS_MASM(masm) masm->
1443 #endif 1435 #endif
1444 1436
1445 1437
1446 } } // namespace v8::internal 1438 } } // namespace v8::internal
1447 1439
1448 #endif // V8_ARM_MACRO_ASSEMBLER_ARM_H_ 1440 #endif // V8_ARM_MACRO_ASSEMBLER_ARM_H_
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