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Issue 13560007: Remove ARM support for soft float (pre-VFP2) (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Review feedback Created 7 years, 8 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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587 587
588 // Save all general purpose registers before messing with them. 588 // Save all general purpose registers before messing with them.
589 const int kNumberOfRegisters = Register::kNumRegisters; 589 const int kNumberOfRegisters = Register::kNumRegisters;
590 590
591 // Everything but pc, lr and ip which will be saved but not restored. 591 // Everything but pc, lr and ip which will be saved but not restored.
592 RegList restored_regs = kJSCallerSaved | kCalleeSaved | ip.bit(); 592 RegList restored_regs = kJSCallerSaved | kCalleeSaved | ip.bit();
593 593
594 const int kDoubleRegsSize = 594 const int kDoubleRegsSize =
595 kDoubleSize * DwVfpRegister::kMaxNumAllocatableRegisters; 595 kDoubleSize * DwVfpRegister::kMaxNumAllocatableRegisters;
596 596
597 if (CpuFeatures::IsSupported(VFP2)) { 597 // Save all allocatable VFP registers before messing with them.
598 CpuFeatureScope scope(masm(), VFP2); 598 ASSERT(kDoubleRegZero.code() == 14);
599 // Save all allocatable VFP registers before messing with them. 599 ASSERT(kScratchDoubleReg.code() == 15);
600 ASSERT(kDoubleRegZero.code() == 14);
601 ASSERT(kScratchDoubleReg.code() == 15);
602 600
603 // Check CPU flags for number of registers, setting the Z condition flag. 601 // Check CPU flags for number of registers, setting the Z condition flag.
604 __ CheckFor32DRegs(ip); 602 __ CheckFor32DRegs(ip);
605 603
606 // Push registers d0-d13, and possibly d16-d31, on the stack. 604 // Push registers d0-d13, and possibly d16-d31, on the stack.
607 // If d16-d31 are not pushed, decrease the stack pointer instead. 605 // If d16-d31 are not pushed, decrease the stack pointer instead.
608 __ vstm(db_w, sp, d16, d31, ne); 606 __ vstm(db_w, sp, d16, d31, ne);
609 __ sub(sp, sp, Operand(16 * kDoubleSize), LeaveCC, eq); 607 __ sub(sp, sp, Operand(16 * kDoubleSize), LeaveCC, eq);
610 __ vstm(db_w, sp, d0, d13); 608 __ vstm(db_w, sp, d0, d13);
611 } else {
612 __ sub(sp, sp, Operand(kDoubleRegsSize));
613 }
614 609
615 // Push all 16 registers (needed to populate FrameDescription::registers_). 610 // Push all 16 registers (needed to populate FrameDescription::registers_).
616 // TODO(1588) Note that using pc with stm is deprecated, so we should perhaps 611 // TODO(1588) Note that using pc with stm is deprecated, so we should perhaps
617 // handle this a bit differently. 612 // handle this a bit differently.
618 __ stm(db_w, sp, restored_regs | sp.bit() | lr.bit() | pc.bit()); 613 __ stm(db_w, sp, restored_regs | sp.bit() | lr.bit() | pc.bit());
619 614
620 const int kSavedRegistersAreaSize = 615 const int kSavedRegistersAreaSize =
621 (kNumberOfRegisters * kPointerSize) + kDoubleRegsSize; 616 (kNumberOfRegisters * kPointerSize) + kDoubleRegsSize;
622 617
623 // Get the bailout id from the stack. 618 // Get the bailout id from the stack.
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662 __ ldr(r1, MemOperand(r0, Deoptimizer::input_offset())); 657 __ ldr(r1, MemOperand(r0, Deoptimizer::input_offset()));
663 658
664 // Copy core registers into FrameDescription::registers_[kNumRegisters]. 659 // Copy core registers into FrameDescription::registers_[kNumRegisters].
665 ASSERT(Register::kNumRegisters == kNumberOfRegisters); 660 ASSERT(Register::kNumRegisters == kNumberOfRegisters);
666 for (int i = 0; i < kNumberOfRegisters; i++) { 661 for (int i = 0; i < kNumberOfRegisters; i++) {
667 int offset = (i * kPointerSize) + FrameDescription::registers_offset(); 662 int offset = (i * kPointerSize) + FrameDescription::registers_offset();
668 __ ldr(r2, MemOperand(sp, i * kPointerSize)); 663 __ ldr(r2, MemOperand(sp, i * kPointerSize));
669 __ str(r2, MemOperand(r1, offset)); 664 __ str(r2, MemOperand(r1, offset));
670 } 665 }
671 666
672 if (CpuFeatures::IsSupported(VFP2)) { 667 // Copy VFP registers to
673 CpuFeatureScope scope(masm(), VFP2); 668 // double_registers_[DoubleRegister::kMaxNumAllocatableRegisters]
674 // Copy VFP registers to 669 int double_regs_offset = FrameDescription::double_registers_offset();
675 // double_registers_[DoubleRegister::kMaxNumAllocatableRegisters] 670 for (int i = 0; i < DwVfpRegister::kMaxNumAllocatableRegisters; ++i) {
676 int double_regs_offset = FrameDescription::double_registers_offset(); 671 int dst_offset = i * kDoubleSize + double_regs_offset;
677 for (int i = 0; i < DwVfpRegister::kMaxNumAllocatableRegisters; ++i) { 672 int src_offset = i * kDoubleSize + kNumberOfRegisters * kPointerSize;
678 int dst_offset = i * kDoubleSize + double_regs_offset; 673 __ vldr(d0, sp, src_offset);
679 int src_offset = i * kDoubleSize + kNumberOfRegisters * kPointerSize; 674 __ vstr(d0, r1, dst_offset);
680 __ vldr(d0, sp, src_offset);
681 __ vstr(d0, r1, dst_offset);
682 }
683 } 675 }
684 676
685 // Remove the bailout id, eventually return address, and the saved registers 677 // Remove the bailout id, eventually return address, and the saved registers
686 // from the stack. 678 // from the stack.
687 if (type() == EAGER || type() == OSR) { 679 if (type() == EAGER || type() == OSR) {
688 __ add(sp, sp, Operand(kSavedRegistersAreaSize + (1 * kPointerSize))); 680 __ add(sp, sp, Operand(kSavedRegistersAreaSize + (1 * kPointerSize)));
689 } else { 681 } else {
690 __ add(sp, sp, Operand(kSavedRegistersAreaSize + (2 * kPointerSize))); 682 __ add(sp, sp, Operand(kSavedRegistersAreaSize + (2 * kPointerSize)));
691 } 683 }
692 684
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742 __ ldr(r7, MemOperand(r6, FrameDescription::frame_content_offset())); 734 __ ldr(r7, MemOperand(r6, FrameDescription::frame_content_offset()));
743 __ push(r7); 735 __ push(r7);
744 __ bind(&inner_loop_header); 736 __ bind(&inner_loop_header);
745 __ cmp(r3, Operand::Zero()); 737 __ cmp(r3, Operand::Zero());
746 __ b(ne, &inner_push_loop); // test for gt? 738 __ b(ne, &inner_push_loop); // test for gt?
747 __ add(r4, r4, Operand(kPointerSize)); 739 __ add(r4, r4, Operand(kPointerSize));
748 __ bind(&outer_loop_header); 740 __ bind(&outer_loop_header);
749 __ cmp(r4, r1); 741 __ cmp(r4, r1);
750 __ b(lt, &outer_push_loop); 742 __ b(lt, &outer_push_loop);
751 743
752 if (CpuFeatures::IsSupported(VFP2)) { 744 // Check CPU flags for number of registers, setting the Z condition flag.
753 CpuFeatureScope scope(masm(), VFP2); 745 __ CheckFor32DRegs(ip);
754 // Check CPU flags for number of registers, setting the Z condition flag.
755 __ CheckFor32DRegs(ip);
756 746
757 __ ldr(r1, MemOperand(r0, Deoptimizer::input_offset())); 747 __ ldr(r1, MemOperand(r0, Deoptimizer::input_offset()));
758 int src_offset = FrameDescription::double_registers_offset(); 748 int src_offset = FrameDescription::double_registers_offset();
759 for (int i = 0; i < DwVfpRegister::kMaxNumRegisters; ++i) { 749 for (int i = 0; i < DwVfpRegister::kMaxNumRegisters; ++i) {
760 if (i == kDoubleRegZero.code()) continue; 750 if (i == kDoubleRegZero.code()) continue;
761 if (i == kScratchDoubleReg.code()) continue; 751 if (i == kScratchDoubleReg.code()) continue;
762 752
763 const DwVfpRegister reg = DwVfpRegister::from_code(i); 753 const DwVfpRegister reg = DwVfpRegister::from_code(i);
764 __ vldr(reg, r1, src_offset, i < 16 ? al : ne); 754 __ vldr(reg, r1, src_offset, i < 16 ? al : ne);
765 src_offset += kDoubleSize; 755 src_offset += kDoubleSize;
766 }
767 } 756 }
768 757
769 // Push state, pc, and continuation from the last output frame. 758 // Push state, pc, and continuation from the last output frame.
770 if (type() != OSR) { 759 if (type() != OSR) {
771 __ ldr(r6, MemOperand(r2, FrameDescription::state_offset())); 760 __ ldr(r6, MemOperand(r2, FrameDescription::state_offset()));
772 __ push(r6); 761 __ push(r6);
773 } 762 }
774 763
775 __ ldr(r6, MemOperand(r2, FrameDescription::pc_offset())); 764 __ ldr(r6, MemOperand(r2, FrameDescription::pc_offset()));
776 __ push(r6); 765 __ push(r6);
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816 __ push(ip); 805 __ push(ip);
817 __ b(&done); 806 __ b(&done);
818 ASSERT(masm()->pc_offset() - start == table_entry_size_); 807 ASSERT(masm()->pc_offset() - start == table_entry_size_);
819 } 808 }
820 __ bind(&done); 809 __ bind(&done);
821 } 810 }
822 811
823 #undef __ 812 #undef __
824 813
825 } } // namespace v8::internal 814 } } // namespace v8::internal
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