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Side by Side Diff: tests_lit/llvm2ice_tests/shift.ll

Issue 1351133003: Optimize 64-bit shifts by constants for x86-32 (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Code review updates Created 5 years, 3 months ago
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1 ; This is a test of C-level conversion operations that clang lowers 1 ; This is a test of C-level conversion operations that clang lowers
2 ; into pairs of shifts. 2 ; into pairs of shifts.
3 3
4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 4 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
5 ; RUN: --target x8632 -i %s --args -O2 \ 5 ; RUN: --target x8632 -i %s --args -O2 \
6 ; RUN: | %if --need=target_X8632 --command FileCheck %s 6 ; RUN: | %if --need=target_X8632 --command FileCheck %s
7 7
8 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 8 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
9 ; RUN: --target x8632 -i %s --args -Om1 \ 9 ; RUN: --target x8632 -i %s --args -Om1 \
10 ; RUN: | %if --need=target_X8632 --command FileCheck %s 10 ; RUN: | %if --need=target_X8632 --command FileCheck %s
(...skipping 94 matching lines...) Expand 10 before | Expand all | Expand 10 after
105 ; CHECK-LABEL: ashrImmLarge 105 ; CHECK-LABEL: ashrImmLarge
106 ; CHECK: sar {{.*}},0x1 106 ; CHECK: sar {{.*}},0x1
107 107
108 define i32 @ashrImmNeg(i32 %val) { 108 define i32 @ashrImmNeg(i32 %val) {
109 entry: 109 entry:
110 %result = ashr i32 %val, -1 110 %result = ashr i32 %val, -1
111 ret i32 %result 111 ret i32 %result
112 } 112 }
113 ; CHECK-LABEL: ashrImmNeg 113 ; CHECK-LABEL: ashrImmNeg
114 ; CHECK: sar {{.*}},0xff 114 ; CHECK: sar {{.*}},0xff
115
116 define i64 @shlImm64One(i64 %val) {
117 entry:
118 %result = shl i64 %val, 1
119 ret i64 %result
120 }
121 ; CHECK-LABEL: shlImm64One
122 ; CHECK: shl {{.*}},1
123
124 define i64 @shlImm64LessThan32(i64 %val) {
125 entry:
126 %result = shl i64 %val, 4
127 ret i64 %result
128 }
129 ; CHECK-LABEL: shlImm64LessThan32
130 ; CHECK: shl {{.*}},0x4
131
132 define i64 @shlImm64Equal32(i64 %val) {
133 entry:
134 %result = shl i64 %val, 32
135 ret i64 %result
136 }
137 ; CHECK-LABEL: shlImm64Equal32
138 ; CHECK-NOT: shl
139
140 define i64 @shlImm64GreaterThan32(i64 %val) {
141 entry:
142 %result = shl i64 %val, 40
143 ret i64 %result
144 }
145 ; CHECK-LABEL: shlImm64GreaterThan32
146 ; CHECK: shl {{.*}},0x8
147
148 define i64 @lshrImm64One(i64 %val) {
149 entry:
150 %result = lshr i64 %val, 1
151 ret i64 %result
152 }
153 ; CHECK-LABEL: lshrImm64One
154 ; CHECK: shr {{.*}},1
155
156 define i64 @lshrImm64LessThan32(i64 %val) {
157 entry:
158 %result = lshr i64 %val, 4
159 ret i64 %result
160 }
161 ; CHECK-LABEL: lshrImm64LessThan32
162 ; CHECK: shrd {{.*}},0x4
163 ; CHECK: shr {{.*}},0x4
164
165 define i64 @lshrImm64Equal32(i64 %val) {
166 entry:
167 %result = lshr i64 %val, 32
168 ret i64 %result
169 }
170 ; CHECK-LABEL: lshrImm64Equal32
171 ; CHECK-NOT: shr
172
173 define i64 @lshrImm64GreaterThan32(i64 %val) {
174 entry:
175 %result = lshr i64 %val, 40
176 ret i64 %result
177 }
178 ; CHECK-LABEL: lshrImm64GreaterThan32
179 ; CHECK-NOT: shrd
180 ; CHECK: shr {{.*}},0x8
181
182 define i64 @ashrImm64One(i64 %val) {
183 entry:
184 %result = ashr i64 %val, 1
185 ret i64 %result
186 }
187 ; CHECK-LABEL: ashrImm64One
188 ; CHECK: shrd {{.*}},0x1
189 ; CHECK: sar {{.*}},1
190
191 define i64 @ashrImm64LessThan32(i64 %val) {
192 entry:
193 %result = ashr i64 %val, 4
194 ret i64 %result
195 }
196 ; CHECK-LABEL: ashrImm64LessThan32
197 ; CHECK: shrd {{.*}},0x4
198 ; CHECK: sar {{.*}},0x4
199
200 define i64 @ashrImm64Equal32(i64 %val) {
201 entry:
202 %result = ashr i64 %val, 32
203 ret i64 %result
204 }
205 ; CHECK-LABEL: ashrImm64Equal32
206 ; CHECK: sar {{.*}},0x1f
207 ; CHECK-NOT: shrd
208
209 define i64 @ashrImm64GreaterThan32(i64 %val) {
210 entry:
211 %result = ashr i64 %val, 40
212 ret i64 %result
213 }
214 ; CHECK-LABEL: ashrImm64GreaterThan32
215 ; CHECK: sar {{.*}},0x1f
216 ; CHECK: shrd {{.*}},0x8
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