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1 ; Tests validating the vfp calling convention for ARM32. | |
Jim Stichnoth
2015/09/16 21:31:54
Is it possible yet to enable crosstest/test_callin
John
2015/09/16 23:12:47
Not yet. Vector types are not handled at all, and
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2 ; | |
3 ; RUN: %if --need=target_ARM32 --need=allow_dump \ | |
4 ; RUN: --command %p2i --filetype=asm --assemble \ | |
5 ; RUN: --disassemble --target arm32 -i %s --args -O2 --skip-unimplemented \ | |
6 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ | |
7 ; RUN: --command FileCheck %s | |
8 ; RUN: %if --need=target_ARM32 --need=allow_dump \ | |
9 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target arm32 \ | |
10 ; RUN: -i %s --args -Om1 --skip-unimplemented \ | |
11 ; RUN: | %if --need=target_ARM32 --need=allow_dump \ | |
12 ; RUN: --command FileCheck %s | |
13 | |
14 ; Boring tests ensuring float arguments are allocated "correctly." Unfortunately | |
15 ; this test cannot verify whether the right arguments are being allocated to the | |
16 ; right register. | |
17 declare void @float1(float %p0) | |
18 declare void @float2(float %p0, float %p1) | |
19 declare void @float3(float %p0, float %p1, float %p2) | |
20 declare void @float4(float %p0, float %p1, float %p2, float %p3) | |
21 declare void @float5(float %p0, float %p1, float %p2, float %p3, float %p4) | |
22 declare void @float6(float %p0, float %p1, float %p2, float %p3, float %p4, | |
23 float %p5) | |
24 declare void @float7(float %p0, float %p1, float %p2, float %p3, float %p4, | |
25 float %p5, float %p6) | |
26 declare void @float8(float %p0, float %p1, float %p2, float %p3, float %p4, | |
27 float %p5, float %p6, float %p7) | |
28 declare void @float9(float %p0, float %p1, float %p2, float %p3, float %p4, | |
29 float %p5, float %p6, float %p7, float %p8) | |
30 declare void @float10(float %p0, float %p1, float %p2, float %p3, float %p4, | |
31 float %p5, float %p6, float %p7, float %p8, float %p9) | |
32 declare void @float11(float %p0, float %p1, float %p2, float %p3, float %p4, | |
33 float %p5, float %p6, float %p7, float %p8, float %p9, | |
34 float %p10) | |
35 declare void @float12(float %p0, float %p1, float %p2, float %p3, float %p4, | |
36 float %p5, float %p6, float %p7, float %p8, float %p9, | |
37 float %p10, float %p11) | |
38 declare void @float13(float %p0, float %p1, float %p2, float %p3, float %p4, | |
39 float %p5, float %p6, float %p7, float %p8, float %p9, | |
40 float %p10, float %p11, float %p12) | |
41 declare void @float14(float %p0, float %p1, float %p2, float %p3, float %p4, | |
42 float %p5, float %p6, float %p7, float %p8, float %p9, | |
43 float %p10, float %p11, float %p12, float %p13) | |
44 declare void @float15(float %p0, float %p1, float %p2, float %p3, float %p4, | |
45 float %p5, float %p6, float %p7, float %p8, float %p9, | |
46 float %p10, float %p11, float %p12, float %p13, | |
47 float %p14) | |
48 declare void @float16(float %p0, float %p1, float %p2, float %p3, float %p4, | |
49 float %p5, float %p6, float %p7, float %p8, float %p9, | |
50 float %p10, float %p11, float %p12, float %p13, | |
51 float %p14, float %p15) | |
52 declare void @float17(float %p0, float %p1, float %p2, float %p3, float %p4, | |
53 float %p5, float %p6, float %p7, float %p8, float %p9, | |
54 float %p10, float %p11, float %p12, float %p13, | |
55 float %p14, float %p15, float %p16) | |
56 declare void @float18(float %p0, float %p1, float %p2, float %p3, float %p4, | |
57 float %p5, float %p6, float %p7, float %p8, float %p9, | |
58 float %p10, float %p11, float %p12, float %p13, | |
59 float %p14, float %p15, float %p16, float %p17) | |
60 define void @floatHarness() nounwind { | |
61 ; CHECK-LABEL: floatHarness | |
62 call void @float1(float 1.0) | |
63 ; CHECK-DAG: vldr s0 | |
64 ; CHECK: bl {{.*}} float1 | |
65 call void @float2(float 1.0, float 2.0) | |
66 ; CHECK-DAG: vldr s0 | |
67 ; CHECK-DAG: vldr s1 | |
68 ; CHECK: bl {{.*}} float2 | |
69 call void @float3(float 1.0, float 2.0, float 3.0) | |
70 ; CHECK-DAG: vldr s0 | |
71 ; CHECK-DAG: vldr s1 | |
72 ; CHECK-DAG: vldr s2 | |
73 ; CHECK: bl {{.*}} float3 | |
74 call void @float4(float 1.0, float 2.0, float 3.0, float 4.0) | |
75 ; CHECK-DAG: vldr s0 | |
76 ; CHECK-DAG: vldr s1 | |
77 ; CHECK-DAG: vldr s2 | |
78 ; CHECK-DAG: vldr s3 | |
79 ; CHECK: bl {{.*}} float4 | |
80 call void @float5(float 1.0, float 2.0, float 3.0, float 4.0, float 5.0) | |
81 ; CHECK-DAG: vldr s0 | |
82 ; CHECK-DAG: vldr s1 | |
83 ; CHECK-DAG: vldr s2 | |
84 ; CHECK-DAG: vldr s3 | |
85 ; CHECK-DAG: vldr s4 | |
86 ; CHECK: bl {{.*}} float5 | |
87 call void @float6(float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, | |
88 float 6.0) | |
89 ; CHECK-DAG: vldr s0 | |
90 ; CHECK-DAG: vldr s1 | |
91 ; CHECK-DAG: vldr s2 | |
92 ; CHECK-DAG: vldr s3 | |
93 ; CHECK-DAG: vldr s4 | |
94 ; CHECK-DAG: vldr s5 | |
95 ; CHECK: bl {{.*}} float6 | |
96 call void @float7(float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, | |
97 float 6.0, float 7.0) | |
98 ; CHECK-DAG: vldr s0 | |
99 ; CHECK-DAG: vldr s1 | |
100 ; CHECK-DAG: vldr s2 | |
101 ; CHECK-DAG: vldr s3 | |
102 ; CHECK-DAG: vldr s4 | |
103 ; CHECK-DAG: vldr s5 | |
104 ; CHECK-DAG: vldr s6 | |
105 ; CHECK: bl {{.*}} float7 | |
106 call void @float8(float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, | |
107 float 6.0, float 7.0, float 8.0) | |
108 ; CHECK-DAG: vldr s0 | |
109 ; CHECK-DAG: vldr s1 | |
110 ; CHECK-DAG: vldr s2 | |
111 ; CHECK-DAG: vldr s3 | |
112 ; CHECK-DAG: vldr s4 | |
113 ; CHECK-DAG: vldr s5 | |
114 ; CHECK-DAG: vldr s6 | |
115 ; CHECK-DAG: vldr s7 | |
116 ; CHECK: bl {{.*}} float8 | |
117 call void @float9(float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, | |
118 float 6.0, float 7.0, float 8.0, float 9.0) | |
119 ; CHECK-DAG: vldr s0 | |
120 ; CHECK-DAG: vldr s1 | |
121 ; CHECK-DAG: vldr s2 | |
122 ; CHECK-DAG: vldr s3 | |
123 ; CHECK-DAG: vldr s4 | |
124 ; CHECK-DAG: vldr s5 | |
125 ; CHECK-DAG: vldr s6 | |
126 ; CHECK-DAG: vldr s7 | |
127 ; CHECK-DAG: vldr s8 | |
128 ; CHECK: bl {{.*}} float9 | |
129 call void @float10(float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, | |
130 float 6.0, float 7.0, float 8.0, float 9.0, float 10.0) | |
131 ; CHECK-DAG: vldr s0 | |
132 ; CHECK-DAG: vldr s1 | |
133 ; CHECK-DAG: vldr s2 | |
134 ; CHECK-DAG: vldr s3 | |
135 ; CHECK-DAG: vldr s4 | |
136 ; CHECK-DAG: vldr s5 | |
137 ; CHECK-DAG: vldr s6 | |
138 ; CHECK-DAG: vldr s7 | |
139 ; CHECK-DAG: vldr s8 | |
140 ; CHECK-DAG: vldr s9 | |
141 ; CHECK: bl {{.*}} float10 | |
142 call void @float11(float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, | |
143 float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, | |
144 float 11.0) | |
145 ; CHECK-DAG: vldr s0 | |
146 ; CHECK-DAG: vldr s1 | |
147 ; CHECK-DAG: vldr s2 | |
148 ; CHECK-DAG: vldr s3 | |
149 ; CHECK-DAG: vldr s4 | |
150 ; CHECK-DAG: vldr s5 | |
151 ; CHECK-DAG: vldr s6 | |
152 ; CHECK-DAG: vldr s7 | |
153 ; CHECK-DAG: vldr s8 | |
154 ; CHECK-DAG: vldr s9 | |
155 ; CHECK-DAG: vldr s10 | |
156 ; CHECK: bl {{.*}} float11 | |
157 call void @float12(float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, | |
158 float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, | |
159 float 11.0, float 12.0) | |
160 ; CHECK-DAG: vldr s0 | |
161 ; CHECK-DAG: vldr s1 | |
162 ; CHECK-DAG: vldr s2 | |
163 ; CHECK-DAG: vldr s3 | |
164 ; CHECK-DAG: vldr s4 | |
165 ; CHECK-DAG: vldr s5 | |
166 ; CHECK-DAG: vldr s6 | |
167 ; CHECK-DAG: vldr s7 | |
168 ; CHECK-DAG: vldr s8 | |
169 ; CHECK-DAG: vldr s9 | |
170 ; CHECK-DAG: vldr s10 | |
171 ; CHECK-DAG: vldr s11 | |
172 ; CHECK: bl {{.*}} float12 | |
173 call void @float13(float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, | |
174 float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, | |
175 float 11.0, float 12.0, float 13.0) | |
176 ; CHECK-DAG: vldr s0 | |
177 ; CHECK-DAG: vldr s1 | |
178 ; CHECK-DAG: vldr s2 | |
179 ; CHECK-DAG: vldr s3 | |
180 ; CHECK-DAG: vldr s4 | |
181 ; CHECK-DAG: vldr s5 | |
182 ; CHECK-DAG: vldr s6 | |
183 ; CHECK-DAG: vldr s7 | |
184 ; CHECK-DAG: vldr s8 | |
185 ; CHECK-DAG: vldr s9 | |
186 ; CHECK-DAG: vldr s10 | |
187 ; CHECK-DAG: vldr s11 | |
188 ; CHECK-DAG: vldr s12 | |
189 ; CHECK: bl {{.*}} float13 | |
190 call void @float14(float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, | |
191 float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, | |
192 float 11.0, float 12.0, float 13.0, float 14.0) | |
193 ; CHECK-DAG: vldr s0 | |
194 ; CHECK-DAG: vldr s1 | |
195 ; CHECK-DAG: vldr s2 | |
196 ; CHECK-DAG: vldr s3 | |
197 ; CHECK-DAG: vldr s4 | |
198 ; CHECK-DAG: vldr s5 | |
199 ; CHECK-DAG: vldr s6 | |
200 ; CHECK-DAG: vldr s7 | |
201 ; CHECK-DAG: vldr s8 | |
202 ; CHECK-DAG: vldr s9 | |
203 ; CHECK-DAG: vldr s10 | |
204 ; CHECK-DAG: vldr s11 | |
205 ; CHECK-DAG: vldr s12 | |
206 ; CHECK-DAG: vldr s13 | |
207 ; CHECK: bl {{.*}} float14 | |
208 call void @float15(float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, | |
209 float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, | |
210 float 11.0, float 12.0, float 13.0, float 14.0, | |
211 float 15.0) | |
212 ; CHECK-DAG: vldr s0 | |
213 ; CHECK-DAG: vldr s1 | |
214 ; CHECK-DAG: vldr s2 | |
215 ; CHECK-DAG: vldr s3 | |
216 ; CHECK-DAG: vldr s4 | |
217 ; CHECK-DAG: vldr s5 | |
218 ; CHECK-DAG: vldr s6 | |
219 ; CHECK-DAG: vldr s7 | |
220 ; CHECK-DAG: vldr s8 | |
221 ; CHECK-DAG: vldr s9 | |
222 ; CHECK-DAG: vldr s10 | |
223 ; CHECK-DAG: vldr s11 | |
224 ; CHECK-DAG: vldr s12 | |
225 ; CHECK-DAG: vldr s13 | |
226 ; CHECK-DAG: vldr s14 | |
227 ; CHECK: bl {{.*}} float15 | |
228 call void @float16(float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, | |
229 float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, | |
230 float 11.0, float 12.0, float 13.0, float 14.0, | |
231 float 15.0, float 16.0) | |
232 ; CHECK-DAG: vldr s0 | |
233 ; CHECK-DAG: vldr s1 | |
234 ; CHECK-DAG: vldr s2 | |
235 ; CHECK-DAG: vldr s3 | |
236 ; CHECK-DAG: vldr s4 | |
237 ; CHECK-DAG: vldr s5 | |
238 ; CHECK-DAG: vldr s6 | |
239 ; CHECK-DAG: vldr s7 | |
240 ; CHECK-DAG: vldr s8 | |
241 ; CHECK-DAG: vldr s9 | |
242 ; CHECK-DAG: vldr s10 | |
243 ; CHECK-DAG: vldr s11 | |
244 ; CHECK-DAG: vldr s12 | |
245 ; CHECK-DAG: vldr s13 | |
246 ; CHECK-DAG: vldr s14 | |
247 ; CHECK-DAG: vldr s15 | |
248 ; CHECK: bl {{.*}} float16 | |
249 call void @float17(float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, | |
250 float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, | |
251 float 11.0, float 12.0, float 13.0, float 14.0, | |
252 float 15.0, float 16.0, float 17.0) | |
253 ; CHECK-DAG: vldr s0 | |
254 ; CHECK-DAG: vldr s1 | |
255 ; CHECK-DAG: vldr s2 | |
256 ; CHECK-DAG: vldr s3 | |
257 ; CHECK-DAG: vldr s4 | |
258 ; CHECK-DAG: vldr s5 | |
259 ; CHECK-DAG: vldr s6 | |
260 ; CHECK-DAG: vldr s7 | |
261 ; CHECK-DAG: vldr s8 | |
262 ; CHECK-DAG: vldr s9 | |
263 ; CHECK-DAG: vldr s10 | |
264 ; CHECK-DAG: vldr s11 | |
265 ; CHECK-DAG: vldr s12 | |
266 ; CHECK-DAG: vldr s13 | |
267 ; CHECK-DAG: vldr s14 | |
268 ; CHECK-DAG: vldr s15 | |
269 ; CHECK-DAG: vstr s{{.*}}, [sp] | |
270 ; CHECK: bl {{.*}} float17 | |
271 call void @float18(float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, | |
272 float 6.0, float 7.0, float 8.0, float 9.0, float 10.0, | |
273 float 11.0, float 12.0, float 13.0, float 14.0, | |
274 float 15.0, float 16.0, float 17.0, float 18.0) | |
275 ; CHECK-DAG: vldr s0 | |
276 ; CHECK-DAG: vldr s1 | |
277 ; CHECK-DAG: vldr s2 | |
278 ; CHECK-DAG: vldr s3 | |
279 ; CHECK-DAG: vldr s4 | |
280 ; CHECK-DAG: vldr s5 | |
281 ; CHECK-DAG: vldr s6 | |
282 ; CHECK-DAG: vldr s7 | |
283 ; CHECK-DAG: vldr s8 | |
284 ; CHECK-DAG: vldr s9 | |
285 ; CHECK-DAG: vldr s10 | |
286 ; CHECK-DAG: vldr s11 | |
287 ; CHECK-DAG: vldr s12 | |
288 ; CHECK-DAG: vldr s13 | |
289 ; CHECK-DAG: vldr s14 | |
290 ; CHECK-DAG: vldr s15 | |
291 ; CHECK-DAG: vstr s{{.*}}, [sp] | |
292 ; CHECK-DAG: vstr s{{.*}}, [sp, #4] | |
293 ; CHECK: bl {{.*}} float18 | |
294 ret void | |
295 } | |
296 | |
297 declare void @double1(double %p0) | |
298 declare void @double2(double %p0, double %p1) | |
299 declare void @double3(double %p0, double %p1, double %p2) | |
300 declare void @double4(double %p0, double %p1, double %p2, double %p3) | |
301 declare void @double5(double %p0, double %p1, double %p2, double %p3, | |
302 double %p4) | |
303 declare void @double6(double %p0, double %p1, double %p2, double %p3, | |
304 double %p4, double %p5) | |
305 declare void @double7(double %p0, double %p1, double %p2, double %p3, | |
306 double %p4, double %p5, double %p6) | |
307 declare void @double8(double %p0, double %p1, double %p2, double %p3, | |
308 double %p4, double %p5, double %p6, double %p7) | |
309 declare void @double9(double %p0, double %p1, double %p2, double %p3, | |
310 double %p4, double %p5, double %p6, double %p7, | |
311 double %p8) | |
312 declare void @double10(double %p0, double %p1, double %p2, double %p3, | |
313 double %p4, double %p5, double %p6, double %p7, | |
314 double %p8, double %p9) | |
315 define void @doubleHarness() nounwind { | |
316 ; CHECK-LABEL: doubleHarness | |
317 call void @double1(double 1.0) | |
318 ; CHECK-DAG: vldr d0 | |
319 ; CHECK: bl {{.*}} double1 | |
320 call void @double2(double 1.0, double 2.0) | |
321 ; CHECK-DAG: vldr d0 | |
322 ; CHECK-DAG: vldr d1 | |
323 ; CHECK: bl {{.*}} double2 | |
324 call void @double3(double 1.0, double 2.0, double 3.0) | |
325 ; CHECK-DAG: vldr d0 | |
326 ; CHECK-DAG: vldr d1 | |
327 ; CHECK-DAG: vldr d2 | |
328 ; CHECK: bl {{.*}} double3 | |
329 call void @double4(double 1.0, double 2.0, double 3.0, double 4.0) | |
330 ; CHECK-DAG: vldr d0 | |
331 ; CHECK-DAG: vldr d1 | |
332 ; CHECK-DAG: vldr d2 | |
333 ; CHECK-DAG: vldr d3 | |
334 ; CHECK: bl {{.*}} double4 | |
335 call void @double5(double 1.0, double 2.0, double 3.0, double 4.0, | |
336 double 5.0) | |
337 ; CHECK-DAG: vldr d0 | |
338 ; CHECK-DAG: vldr d1 | |
339 ; CHECK-DAG: vldr d2 | |
340 ; CHECK-DAG: vldr d3 | |
341 ; CHECK-DAG: vldr d4 | |
342 ; CHECK: bl {{.*}} double5 | |
343 call void @double6(double 1.0, double 2.0, double 3.0, double 4.0, | |
344 double 5.0, double 6.0) | |
345 ; CHECK-DAG: vldr d0 | |
346 ; CHECK-DAG: vldr d1 | |
347 ; CHECK-DAG: vldr d2 | |
348 ; CHECK-DAG: vldr d3 | |
349 ; CHECK-DAG: vldr d4 | |
350 ; CHECK-DAG: vldr d5 | |
351 ; CHECK: bl {{.*}} double6 | |
352 call void @double7(double 1.0, double 2.0, double 3.0, double 4.0, | |
353 double 5.0, double 6.0, double 7.0) | |
354 ; CHECK-DAG: vldr d0 | |
355 ; CHECK-DAG: vldr d1 | |
356 ; CHECK-DAG: vldr d2 | |
357 ; CHECK-DAG: vldr d3 | |
358 ; CHECK-DAG: vldr d4 | |
359 ; CHECK-DAG: vldr d5 | |
360 ; CHECK-DAG: vldr d6 | |
361 ; CHECK: bl {{.*}} double7 | |
362 call void @double8(double 1.0, double 2.0, double 3.0, double 4.0, | |
363 double 5.0, double 6.0, double 7.0, double 8.0) | |
364 ; CHECK-DAG: vldr d0 | |
365 ; CHECK-DAG: vldr d1 | |
366 ; CHECK-DAG: vldr d2 | |
367 ; CHECK-DAG: vldr d3 | |
368 ; CHECK-DAG: vldr d4 | |
369 ; CHECK-DAG: vldr d5 | |
370 ; CHECK-DAG: vldr d6 | |
371 ; CHECK-DAG: vldr d7 | |
372 ; CHECK: bl {{.*}} double8 | |
373 call void @double9(double 1.0, double 2.0, double 3.0, double 4.0, | |
374 double 5.0, double 6.0, double 7.0, double 8.0, | |
375 double 9.0) | |
376 ; CHECK-DAG: vldr d0 | |
377 ; CHECK-DAG: vldr d1 | |
378 ; CHECK-DAG: vldr d2 | |
379 ; CHECK-DAG: vldr d3 | |
380 ; CHECK-DAG: vldr d4 | |
381 ; CHECK-DAG: vldr d5 | |
382 ; CHECK-DAG: vldr d6 | |
383 ; CHECK-DAG: vldr d7 | |
384 ; CHECK-DAG: vstr d{{.*}}, [sp] | |
385 ; CHECK: bl {{.*}} double9 | |
386 call void @double10(double 1.0, double 2.0, double 3.0, double 4.0, | |
387 double 5.0, double 6.0, double 7.0, double 8.0, | |
388 double 9.0, double 10.0) | |
389 ; CHECK-DAG: vldr d0 | |
390 ; CHECK-DAG: vldr d1 | |
391 ; CHECK-DAG: vldr d2 | |
392 ; CHECK-DAG: vldr d3 | |
393 ; CHECK-DAG: vldr d4 | |
394 ; CHECK-DAG: vldr d5 | |
395 ; CHECK-DAG: vldr d6 | |
396 ; CHECK-DAG: vldr d7 | |
397 ; CHECK-DAG: vstr d{{.*}}, [sp] | |
398 ; CHECK-DAG: vstr d{{.*}}, [sp, #8] | |
399 ; CHECK: bl {{.*}} double10 | |
400 | |
401 ret void | |
402 } | |
403 | |
404 declare void @testFDF(float %p0, double %p1, float %p2) | |
405 declare void @testFDDF(float %p0, double %p1, double %p2, float %p3) | |
406 declare void @testFDDDF(float %p0, double %p1, double %p2, double %p3, | |
407 float %p4) | |
408 declare void @testFDDDDF(float %p0, double %p1, double %p2, double %p3, | |
409 double %p4, float %p5) | |
410 declare void @testFDDDDDF(float %p0, double %p1, double %p2, double %p3, | |
411 double %p4, double %p5, float %p6) | |
412 declare void @testFDDDDDDF(float %p0, double %p1, double %p2, double %p3, | |
413 double %p4, double %p5, double %p6, float %p7) | |
414 declare void @testFDDDDDDDF(float %p0, double %p1, double %p2, double %p3, | |
415 double %p4, double %p5, double %p6, double %p7, | |
416 float %p8) | |
417 declare void @testFDDDDDDDFD(float %p0, double %p1, double %p2, double %p3, | |
418 double %p4, double %p5, double %p6, double %p7, | |
419 float %p8, double %p9) | |
420 declare void @testFDDDDDDDDF(float %p0, double %p1, double %p2, double %p3, | |
421 double %p4, double %p5, double %p6, double %p7, | |
422 double %p8, float %p9) | |
423 declare void @testFDDDDDDDDDF(float %p0, double %p1, double %p2, double %p3, | |
424 double %p4, double %p5, double %p6, double %p7, | |
425 double %p8, double %p9, float %p10) | |
426 declare void @testFDDDDDDDDFD(float %p0, double %p1, double %p2, double %p3, | |
427 double %p4, double %p5, double %p6, double %p7, | |
428 double %p8, float %p9, double %p10) | |
429 declare void @testFDDDDDDDDFDF(float %p0, double %p1, double %p2, double %p3, | |
430 double %p4, double %p5, double %p6, double %p7, | |
431 double %p8, float %p9, double %p10, float %p11) | |
432 define void @packsFloats() nounwind { | |
433 ; CHECK-LABEL: packsFloats | |
434 call void @testFDF(float 1.0, double 2.0, float 3.0) | |
435 ; CHECK-DAG: vldr s0 | |
436 ; CHECK-DAG: vldr d1 | |
437 ; CHECK-DAG: vldr s1 | |
438 ; CHECK: bl {{.*}} testFDF | |
439 call void @testFDDF(float 1.0, double 2.0, double 3.0, float 4.0) | |
440 ; CHECK-DAG: vldr s0 | |
441 ; CHECK-DAG: vldr d1 | |
442 ; CHECK-DAG: vldr d2 | |
443 ; CHECK-DAG: vldr s1 | |
444 ; CHECK: bl {{.*}} testFDDF | |
445 call void @testFDDDF(float 1.0, double 2.0, double 3.0, double 4.0, | |
446 float 5.0) | |
447 ; CHECK-DAG: vldr s0 | |
448 ; CHECK-DAG: vldr d1 | |
449 ; CHECK-DAG: vldr d2 | |
450 ; CHECK-DAG: vldr d3 | |
451 ; CHECK-DAG: vldr s1 | |
452 ; CHECK: bl {{.*}} testFDDDF | |
453 call void @testFDDDDF(float 1.0, double 2.0, double 3.0, double 4.0, | |
454 double 5.0, float 6.0) | |
455 ; CHECK-DAG: vldr s0 | |
456 ; CHECK-DAG: vldr d1 | |
457 ; CHECK-DAG: vldr d2 | |
458 ; CHECK-DAG: vldr d3 | |
459 ; CHECK-DAG: vldr d4 | |
460 ; CHECK-DAG: vldr s1 | |
461 ; CHECK: bl {{.*}} testFDDDDF | |
462 call void @testFDDDDDF(float 1.0, double 2.0, double 3.0, double 4.0, | |
463 double 5.0, double 6.0, float 7.0) | |
464 ; CHECK-DAG: vldr s0 | |
465 ; CHECK-DAG: vldr d1 | |
466 ; CHECK-DAG: vldr d2 | |
467 ; CHECK-DAG: vldr d3 | |
468 ; CHECK-DAG: vldr d4 | |
469 ; CHECK-DAG: vldr d5 | |
470 ; CHECK-DAG: vldr s1 | |
471 ; CHECK: bl {{.*}} testFDDDDDF | |
472 call void @testFDDDDDDF(float 1.0, double 2.0, double 3.0, double 4.0, | |
473 double 5.0, double 6.0, double 7.0, float 8.0) | |
474 ; CHECK-DAG: vldr s0 | |
475 ; CHECK-DAG: vldr d1 | |
476 ; CHECK-DAG: vldr d2 | |
477 ; CHECK-DAG: vldr d3 | |
478 ; CHECK-DAG: vldr d4 | |
479 ; CHECK-DAG: vldr d5 | |
480 ; CHECK-DAG: vldr d6 | |
481 ; CHECK-DAG: vldr s1 | |
482 ; CHECK: bl {{.*}} testFDDDDDDF | |
483 call void @testFDDDDDDDF(float 1.0, double 2.0, double 3.0, double 4.0, | |
484 double 5.0, double 6.0, double 7.0, double 8.0, | |
485 float 9.0) | |
486 ; CHECK-DAG: vldr s0 | |
487 ; CHECK-DAG: vldr d1 | |
488 ; CHECK-DAG: vldr d2 | |
489 ; CHECK-DAG: vldr d3 | |
490 ; CHECK-DAG: vldr d4 | |
491 ; CHECK-DAG: vldr d5 | |
492 ; CHECK-DAG: vldr d6 | |
493 ; CHECK-DAG: vldr d7 | |
494 ; CHECK-DAG: vldr s1 | |
495 ; CHECK: bl {{.*}} testFDDDDDDDF | |
496 call void @testFDDDDDDDFD(float 1.0, double 2.0, double 3.0, double 4.0, | |
497 double 5.0, double 6.0, double 7.0, double 8.0, | |
498 float 9.0, double 10.0) | |
499 ; CHECK-DAG: vldr s0 | |
500 ; CHECK-DAG: vldr d1 | |
501 ; CHECK-DAG: vldr d2 | |
502 ; CHECK-DAG: vldr d3 | |
503 ; CHECK-DAG: vldr d4 | |
504 ; CHECK-DAG: vldr d5 | |
505 ; CHECK-DAG: vldr d6 | |
506 ; CHECK-DAG: vldr d7 | |
507 ; CHECK-DAG: vstr d{{.*}}, [sp] | |
508 ; CHECK-DAG: vldr s1 | |
509 ; CHECK: bl {{.*}} testFDDDDDDDFD | |
510 call void @testFDDDDDDDDF(float 1.0, double 2.0, double 3.0, double 4.0, | |
511 double 5.0, double 6.0, double 7.0, double 8.0, | |
512 double 9.0, float 10.0) | |
513 ; CHECK-DAG: vldr s0 | |
514 ; CHECK-DAG: vldr d1 | |
515 ; CHECK-DAG: vldr d2 | |
516 ; CHECK-DAG: vldr d3 | |
517 ; CHECK-DAG: vldr d4 | |
518 ; CHECK-DAG: vldr d5 | |
519 ; CHECK-DAG: vldr d6 | |
520 ; CHECK-DAG: vldr d7 | |
521 ; CHECK-DAG: vstr d{{.*}}, [sp] | |
522 ; CHECK-DAG: vstr s{{.*}}, [sp, #8] | |
523 ; CHECK: bl {{.*}} testFDDDDDDDDF | |
524 call void @testFDDDDDDDDDF(float 1.0, double 2.0, double 3.0, double 4.0, | |
525 double 5.0, double 6.0, double 7.0, double 8.0, | |
526 double 9.0, double 10.0, float 11.0) | |
527 ; CHECK-DAG: vldr s0 | |
528 ; CHECK-DAG: vldr d1 | |
529 ; CHECK-DAG: vldr d2 | |
530 ; CHECK-DAG: vldr d3 | |
531 ; CHECK-DAG: vldr d4 | |
532 ; CHECK-DAG: vldr d5 | |
533 ; CHECK-DAG: vldr d6 | |
534 ; CHECK-DAG: vldr d7 | |
535 ; CHECK-DAG: vstr d{{.*}}, [sp] | |
536 ; CHECK-DAG: vstr d{{.*}}, [sp, #8] | |
537 ; CHECK-DAG: vstr s{{.*}}, [sp, #16] | |
538 ; CHECK: bl {{.*}} testFDDDDDDDDDF | |
539 call void @testFDDDDDDDDFD(float 1.0, double 2.0, double 3.0, double 4.0, | |
540 double 5.0, double 6.0, double 7.0, double 8.0, | |
541 double 9.0, float 10.0, double 11.0) | |
542 ; CHECK-DAG: vldr s0 | |
543 ; CHECK-DAG: vldr d1 | |
544 ; CHECK-DAG: vldr d2 | |
545 ; CHECK-DAG: vldr d3 | |
546 ; CHECK-DAG: vldr d4 | |
547 ; CHECK-DAG: vldr d5 | |
548 ; CHECK-DAG: vldr d6 | |
549 ; CHECK-DAG: vldr d7 | |
550 ; CHECK-DAG: vstr d{{.*}}, [sp] | |
551 ; CHECK-DAG: vstr s{{.*}}, [sp, #8] | |
552 ; CHECK-DAG: vstr d{{.*}}, [sp, #16] | |
553 ; CHECK: bl {{.*}} testFDDDDDDDDFD | |
554 call void @testFDDDDDDDDFDF(float 1.0, double 2.0, double 3.0, double 4.0, | |
555 double 5.0, double 6.0, double 7.0, double 8.0, | |
556 double 9.0, float 10.0, double 11.0, float 12.0) | |
557 ; CHECK-DAG: vldr s0 | |
558 ; CHECK-DAG: vldr d1 | |
559 ; CHECK-DAG: vldr d2 | |
560 ; CHECK-DAG: vldr d3 | |
561 ; CHECK-DAG: vldr d4 | |
562 ; CHECK-DAG: vldr d5 | |
563 ; CHECK-DAG: vldr d6 | |
564 ; CHECK-DAG: vldr d7 | |
565 ; CHECK-DAG: vstr d{{.*}}, [sp] | |
566 ; CHECK-DAG: vstr s{{.*}}, [sp, #8] | |
567 ; CHECK-DAG: vstr d{{.*}}, [sp, #16] | |
568 ; CHECK-DAG: vstr s{{.*}}, [sp, #24] | |
569 ; CHECK: bl {{.*}} testFDDDDDDDDFD | |
570 | |
571 ret void | |
572 } | |
573 | |
574 declare void @tDDDDDDDDFD(double %p1, double %p2, double %p3, double %p4, double %p5, double %p6, double %p7, double %p8, float %p9, double %p10) | |
575 | |
576 define void @foo() { | |
577 call void @tDDDDDDDDFD(double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, float 1.0, double 1.0) | |
578 ret void | |
579 } | |
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