Subzero. Fixes ARM32 VFP calling convention.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 522 matching lines @@
   Str << "\t"
       << "vmov"
       << "\t";
   Dest0->emit(Func);
   Str << ", ";
   Src0->emit(Func);
   Str << ", ";
   Src1->emit(Func);
 }
 
+namespace {
+bool isVariableWithoutRegister(Operand *Op) {

[Jim Stichnoth, 2015/09/16 21:31:54]

Consider declaring these as const Operand * ?

[John, 2015/09/16 23:12:46]

Done.

+  if (const auto *OpV = llvm::dyn_cast<Variable>(Op)) {
+    return !OpV->hasReg();
+  }
+  return false;
+}
+
+bool isMemoryAccess(Operand *Op) {
+  return isVariableWithoutRegister(Op) || llvm::isa<OperandARM32Mem>(Op);
+}
+} // end of anonymous namespace
+
 void InstARM32Vmov::emitSingleDestSingleSource(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Variable *Dest = getDest();
   if (Dest->hasReg()) {
-    IceString ActualOpcode = "vmov";
     Operand *Src0 = getSrc(0);
-    if (const auto *Src0V = llvm::dyn_cast<Variable>(Src0)) {
-      if (!Src0V->hasReg()) {
-        ActualOpcode = IceString("vldr");
-      }
-    } else {
-      if (llvm::isa<OperandARM32Mem>(Src0))
-        ActualOpcode = IceString("vldr");
-    }
+    const char *ActualOpcode = isMemoryAccess(Src0) ? "vldr" : "vmov";
     Str << "\t" << ActualOpcode << "\t";
-    getDest()->emit(Func);
+    Dest->emit(Func);
     Str << ", ";
-    getSrc(0)->emit(Func);
+    Src0->emit(Func);
   } else {
     Variable *Src0 = llvm::cast<Variable>(getSrc(0));
     assert(Src0->hasReg());
     Str << "\t"
            "vstr"
            "\t";
     Src0->emit(Func);
     Str << ", ";
     Dest->emit(Func);
   }
@@ skipping 319 matching lines @@
   Str << "ret." << Ty << " ";
   dumpSources(Func);
 }
 
 void InstARM32Str::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Type Ty = getSrc(0)->getType();
-  Str << "\t"
-      << "str" << getWidthString(Ty) << getPredicate() << "\t";
+  const char *Opcode = isScalarFloatingType(Ty) ? "vstr" : "str";
+  Str << "\t" << Opcode << getWidthString(Ty) << getPredicate() << "\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
 }
 
 void InstARM32Str::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   (void)Func;
   llvm_unreachable("Not yet implemented");
 }
@@ skipping 237 matching lines @@
   if (getShiftOp() != kNoShift) {
     Str << ", " << InstARM32ShiftAttributes[getShiftOp()].EmitString << " ";
     if (Func)
       getShiftAmt()->dump(Func);
     else
       getShiftAmt()->dump(Str);
   }
 }
 
 } // end of namespace Ice