Introduces a second temporary register for MIPS assembler macros.

runtime/vm/assembler_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/runtime_entry.h"
 #include "vm/simulator.h"
@@ skipping 62 matching lines @@
       addu(rd, rd, PP);
       lw(rd, Address(rd, offset_low));
     } else {
       lw(rd, Address(PP, offset_low));
     }
   }
 }
 
 
 void Assembler::AdduDetectOverflow(Register rd, Register rs, Register rt,
-                                   Register ro, Register scratch) {
+                                   Register ro) {
   ASSERT(rd != ro);
-  ASSERT(rd != TMP);
-  ASSERT(ro != TMP);
+  ASSERT(rd != TMP1);
+  ASSERT(ro != TMP1);
   ASSERT(ro != rs);
   ASSERT(ro != rt);
 
   if ((rs == rt) && (rd == rs)) {
-    ASSERT(scratch != kNoRegister);
-    ASSERT(rd != scratch);
-    ASSERT(ro != scratch);
-    ASSERT(scratch != TMP);
-    mov(scratch, rt);
-    rt = scratch;
+    ASSERT(rd != TMP2);
+    ASSERT(ro != TMP2);
+    ASSERT(rs != TMP2);
+    ASSERT(rt != TMP2);
+    mov(TMP2, rt);
+    rt = TMP2;
   }
 
   if (rd == rs) {
-    mov(TMP, rs);  // Preserve rs.
+    mov(TMP1, rs);  // Preserve rs.
     addu(rd, rs, rt);  // rs is overwritten.
-    xor_(TMP, rd, TMP);  // Original rs.
+    xor_(TMP1, rd, TMP1);  // Original rs.
     xor_(ro, rd, rt);
-    and_(ro, ro, TMP);
+    and_(ro, ro, TMP1);
   } else if (rd == rt) {
-    mov(TMP, rt);  // Preserve rt.
+    mov(TMP1, rt);  // Preserve rt.
     addu(rd, rs, rt);  // rt is overwritten.
-    xor_(TMP, rd, TMP);  // Original rt.
+    xor_(TMP1, rd, TMP1);  // Original rt.
     xor_(ro, rd, rs);
-    and_(ro, ro, TMP);
+    and_(ro, ro, TMP1);
   } else {
     addu(rd, rs, rt);
     xor_(ro, rd, rs);
-    xor_(TMP, rd, rt);
-    and_(ro, TMP, ro);
+    xor_(TMP1, rd, rt);
+    and_(ro, TMP1, ro);
   }
 }
 
 
 void Assembler::LoadObject(Register rd, const Object& object) {
   // Smi's and VM heap objects are never relocated; do not use object pool.
   if (object.IsSmi()) {
     LoadImmediate(rd, reinterpret_cast<int32_t>(object.raw()));
   } else if (object.InVMHeap()) {
     // Make sure that class CallPattern is able to decode this load immediate.
@@ skipping 24 matching lines @@
     if (object_pool_.At(i) == obj.raw()) {
       return i;
     }
   }
   object_pool_.Add(obj, Heap::kOld);
   return object_pool_.Length() - 1;
 }
 
 
 void Assembler::PushObject(const Object& object) {
-  LoadObject(TMP, object);
-  Push(TMP);
+  LoadObject(TMP1, object);
+  Push(TMP1);
 }
 
 
 void Assembler::CompareObject(Register rd, Register rn, const Object& object) {
-  ASSERT(rn != TMP);
-  LoadObject(TMP, object);
-  subu(rd, rn, TMP);
+  ASSERT(rn != TMP1);
+  LoadObject(TMP1, object);
+  subu(rd, rn, TMP1);
 }
 
 
 void Assembler::LoadClassId(Register result, Register object) {
   ASSERT(RawObject::kClassIdTagBit == 16);
   ASSERT(RawObject::kClassIdTagSize == 16);
   const intptr_t class_id_offset = Object::tags_offset() +
       RawObject::kClassIdTagBit / kBitsPerByte;
   lhu(result, FieldAddress(object, class_id_offset));
 }
 
 
 void Assembler::LoadClassById(Register result, Register class_id) {
   ASSERT(result != class_id);
   lw(result, FieldAddress(CTX, Context::isolate_offset()));
   const intptr_t table_offset_in_isolate =
       Isolate::class_table_offset() + ClassTable::table_offset();
   lw(result, Address(result, table_offset_in_isolate));
-  sll(TMP, class_id, 2);
-  addu(result, result, TMP);
+  sll(TMP1, class_id, 2);
+  addu(result, result, TMP1);
   lw(result, Address(result));
 }
 
 
-void Assembler::LoadClass(Register result, Register object, Register scratch) {
-  ASSERT(scratch != result);
-  LoadClassId(scratch, object);
+void Assembler::LoadClass(Register result, Register object) {
+  ASSERT(TMP1 != result);
+  LoadClassId(TMP1, object);
 
   lw(result, FieldAddress(CTX, Context::isolate_offset()));
   const intptr_t table_offset_in_isolate =
       Isolate::class_table_offset() + ClassTable::table_offset();
   lw(result, Address(result, table_offset_in_isolate));
-  sll(scratch, scratch, 2);
-  addu(result, result, scratch);
+  sll(TMP1, TMP1, 2);
+  addu(result, result, TMP1);
   lw(result, Address(result));
 }
 
 
 void Assembler::EnterStubFrame() {
   addiu(SP, SP, Immediate(-3 * kWordSize));
   sw(ZR, Address(SP, 2 * kWordSize));  // PC marker is 0 in stubs.
   sw(RA, Address(SP, 1 * kWordSize));
   sw(FP, Address(SP, 0 * kWordSize));
   mov(FP, SP);
@@ skipping 67 matching lines @@
   // Adjust SP for PC pushed in EnterDartFrame.
   addiu(SP, SP, Immediate(4 * kWordSize));
 }
 
 
 void Assembler::ReserveAlignedFrameSpace(intptr_t frame_space) {
   // Reserve space for arguments and align frame before entering
   // the C++ world.
   addiu(SP, SP, Immediate(-frame_space));
   if (OS::ActivationFrameAlignment() > 0) {
-    LoadImmediate(TMP, ~(OS::ActivationFrameAlignment() - 1));
-    and_(SP, SP, TMP);
+    LoadImmediate(TMP1, ~(OS::ActivationFrameAlignment() - 1));
+    and_(SP, SP, TMP1);
   }
 }
 
 
 int32_t Assembler::AddExternalLabel(const ExternalLabel* label) {
   if (object_pool_.IsNull()) {
     // The object pool cannot be used in the vm isolate.
     ASSERT(Isolate::Current() != Dart::vm_isolate());
     object_pool_ = GrowableObjectArray::New(Heap::kOld);
   }
@@ skipping 16 matching lines @@
   b(&stop);
   Emit(reinterpret_cast<int32_t>(message));
   Bind(&stop);
   break_(Instr::kStopMessageCode);
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS