Implements optional parameter handling in MIPS vm.

runtime/vm/assembler_mips_test.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/assembler.h"
 #include "vm/os.h"
 #include "vm/unit_test.h"
@@ skipping 971 matching lines @@
   __ jr(RA);
 }
 
 
 ASSEMBLER_TEST_RUN(Bnel, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
+ASSEMBLER_TEST_GENERATE(Label_link1, assembler) {
+  Label l;
+
+  __ bgez(ZR, &l);
+  __ bgez(ZR, &l);
+  __ bgez(ZR, &l);
+
+  __ Bind(&l);
+  __ mov(V0, ZR);
+  __ jr(RA);

[regis, 2013/04/03 21:12:39]

Whether the branch is taken or not, the returned result will be zero. How about
inserting LoadImmediate(V0, 1); jr(RA); before the Bind?

[zra, 2013/04/03 21:41:00]

Done.

+}
+
+
+ASSEMBLER_TEST_RUN(Label_link1, test) {
+  typedef int (*SimpleCode)();
+  EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Label_link2, assembler) {
+  Label l;
+
+  __ beq(ZR, ZR, &l);
+  __ beq(ZR, ZR, &l);
+  __ beq(ZR, ZR, &l);
+

[regis, 2013/04/03 21:12:39]

ditto

[zra, 2013/04/03 21:41:00]

Done.

+  __ Bind(&l);
+  __ mov(V0, ZR);
+  __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Label_link2, test) {
+  typedef int (*SimpleCode)();
+  EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
 ASSEMBLER_TEST_GENERATE(Jalr_delay, assembler) {
   __ mov(R2, RA);
   __ jalr(R2, RA);
   __ delay_slot()->ori(V0, ZR, Immediate(42));
 }
 
 
 ASSEMBLER_TEST_RUN(Jalr_delay, test) {
   typedef int (*SimpleCode)();
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS