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Side by Side Diff: src/IceTargetLowering.h

Issue 1343843003: Refactor all instances of `typedef y x` to the C++11 `using x = y` syntax. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 3 months ago
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1 //===- subzero/src/IceTargetLowering.h - Lowering interface -----*- C++ -*-===// 1 //===- subzero/src/IceTargetLowering.h - Lowering interface -----*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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199 LoweringContext &getContext() { return Context; } 199 LoweringContext &getContext() { return Context; }
200 200
201 enum RegSet { 201 enum RegSet {
202 RegSet_None = 0, 202 RegSet_None = 0,
203 RegSet_CallerSave = 1 << 0, 203 RegSet_CallerSave = 1 << 0,
204 RegSet_CalleeSave = 1 << 1, 204 RegSet_CalleeSave = 1 << 1,
205 RegSet_StackPointer = 1 << 2, 205 RegSet_StackPointer = 1 << 2,
206 RegSet_FramePointer = 1 << 3, 206 RegSet_FramePointer = 1 << 3,
207 RegSet_All = ~RegSet_None 207 RegSet_All = ~RegSet_None
208 }; 208 };
209 typedef uint32_t RegSetMask; 209 using RegSetMask = uint32_t;
210 210
211 virtual llvm::SmallBitVector getRegisterSet(RegSetMask Include, 211 virtual llvm::SmallBitVector getRegisterSet(RegSetMask Include,
212 RegSetMask Exclude) const = 0; 212 RegSetMask Exclude) const = 0;
213 virtual const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const = 0; 213 virtual const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const = 0;
214 virtual const llvm::SmallBitVector &getAliasesForRegister(SizeT) const = 0; 214 virtual const llvm::SmallBitVector &getAliasesForRegister(SizeT) const = 0;
215 215
216 void regAlloc(RegAllocKind Kind); 216 void regAlloc(RegAllocKind Kind);
217 217
218 virtual void 218 virtual void
219 makeRandomRegisterPermutation(llvm::SmallVectorImpl<int32_t> &Permutation, 219 makeRandomRegisterPermutation(llvm::SmallVectorImpl<int32_t> &Permutation,
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456 virtual void lower() {} 456 virtual void lower() {}
457 457
458 protected: 458 protected:
459 explicit TargetHeaderLowering(GlobalContext *Ctx) : Ctx(Ctx) {} 459 explicit TargetHeaderLowering(GlobalContext *Ctx) : Ctx(Ctx) {}
460 GlobalContext *Ctx; 460 GlobalContext *Ctx;
461 }; 461 };
462 462
463 } // end of namespace Ice 463 } // end of namespace Ice
464 464
465 #endif // SUBZERO_SRC_ICETARGETLOWERING_H 465 #endif // SUBZERO_SRC_ICETARGETLOWERING_H
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