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Unified Diff: tests_lit/llvm2ice_tests/bitcast.ll

Issue 1343783003: Subzero. Implements the scalar bitcast operations for ARM32. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addresses comments, and merges. Created 5 years, 3 months ago
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Index: tests_lit/llvm2ice_tests/bitcast.ll
diff --git a/tests_lit/llvm2ice_tests/bitcast.ll b/tests_lit/llvm2ice_tests/bitcast.ll
index 40a654cbfeea55d82c7ccc693b5be1c635e805db..388afb1d65f56303270a7a5d524a94eb45786646 100644
--- a/tests_lit/llvm2ice_tests/bitcast.ll
+++ b/tests_lit/llvm2ice_tests/bitcast.ll
@@ -3,6 +3,16 @@
; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s
; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s
+; RUN: %if --need=allow_dump --need=target_ARM32 --command %p2i --filetype=asm \
+; RUN: --target arm32 -i %s --args -O2 --skip-unimplemented \
+; RUN: | %if --need=allow_dump --need=target_ARM32 --command FileCheck %s \
+; RUN: --check-prefix=ARM32
+
+; RUN: %if --need=allow_dump --need=target_ARM32 --command %p2i --filetype=asm \
+; RUN: --target arm32 -i %s --args -Om1 --skip-unimplemented \
+; RUN: | %if --need=allow_dump --need=target_ARM32 --command FileCheck %s \
+; RUN: --check-prefix=ARM32
+
define internal i32 @cast_f2i(float %f) {
entry:
%v0 = bitcast float %f to i32
@@ -10,6 +20,8 @@ entry:
}
; CHECK-LABEL: cast_f2i
; CHECK: mov eax
+; ARM32-LABEL: cast_f2i
+; ARM32: vmov r{{[0-9]+}}, s{{[0-9]+}}
define internal float @cast_i2f(i32 %i) {
entry:
@@ -18,6 +30,8 @@ entry:
}
; CHECK-LABEL: cast_i2f
; CHECK: fld DWORD PTR
+; ARM32-LABEL: cast_i2f
+; ARM32: vmov s{{[0-9]+}}, r{{[0-9]+}}
define internal i64 @cast_d2ll(double %d) {
entry:
@@ -26,6 +40,8 @@ entry:
}
; CHECK-LABEL: cast_d2ll
; CHECK: mov edx
+; ARM32-LABEL: cast_d2ll
+; ARM32: vmov r{{[0-9]+}}, r{{[0-9]+}}, d{{[0-9]+}}
define internal i64 @cast_d2ll_const() {
entry:
@@ -35,6 +51,11 @@ entry:
; CHECK-LABEL: cast_d2ll_const
; CHECK: mov e{{..}},DWORD PTR ds:0x0 {{.*}} .L$double$0
; CHECK: mov e{{..}},DWORD PTR ds:0x4 {{.*}} .L$double$0
+; ARM32-LABEL: cast_d2ll_const
+; ARM32-DAG: movw [[ADDR:r[0-9]+]], #:lower16:.L$
+; ARM32-DAG: movt [[ADDR]], #:upper16:.L$
+; ARM32-DAG: vldr [[DREG:d[0-9]+]], {{\[}}[[ADDR]], #0{{\]}}
+; ARM32: vmov r{{[0-9]+}}, r{{[0-9]+}}, [[DREG]]
define internal double @cast_ll2d(i64 %ll) {
entry:
@@ -43,6 +64,8 @@ entry:
}
; CHECK-LABEL: cast_ll2d
; CHECK: fld QWORD PTR
+; ARM32-LABEL: cast_ll2d
+; ARM32: vmov d{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}
define internal double @cast_ll2d_const() {
entry:
@@ -53,3 +76,8 @@ entry:
; CHECK: mov {{.*}},0x73ce2ff2
; CHECK: mov {{.*}},0xb3a
; CHECK: fld QWORD PTR
+; ARM32-LABEL: cast_ll2d_const
+; ARM32-DAG: movw [[REG0:r[0-9]+]], #12274
+; ARM32-DAG: movt [[REG0:r[0-9]+]], #29646
+; ARM32-DAG: movw [[REG1:r[0-9]+]], #2874
+; ARM32: vmov d{{[0-9]+}}, [[REG0]], [[REG1]]
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