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| 1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// | 1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 403 // There are a whole bunch of vmov variants, to transfer within | 403 // There are a whole bunch of vmov variants, to transfer within |
| 404 // S/D/Q registers, between core integer registers and S/D, | 404 // S/D/Q registers, between core integer registers and S/D, |
| 405 // and from small immediates into S/D. | 405 // and from small immediates into S/D. |
| 406 // For integer -> S/D/Q there is a variant which takes two integer | 406 // For integer -> S/D/Q there is a variant which takes two integer |
| 407 // register to fill a D, or to fill two consecutive S registers. | 407 // register to fill a D, or to fill two consecutive S registers. |
| 408 // Vmov can also be used to insert-element. E.g., | 408 // Vmov can also be used to insert-element. E.g., |
| 409 // "vmov.8 d0[1], r0" | 409 // "vmov.8 d0[1], r0" |
| 410 // but insert-element is a "two-address" operation where only part of the | 410 // but insert-element is a "two-address" operation where only part of the |
| 411 // register is modified. This cannot model that. | 411 // register is modified. This cannot model that. |
| 412 // | 412 // |
| 413 // This represents the simple single source, single dest variants only. | 413 // This represents the simple single source, single dest variants only. |
|
Jim Stichnoth
2015/09/14 23:15:42
Update this comment?
John
2015/09/16 21:07:52
Done.
| |
| 414 void _vmov(Variable *Dest, Operand *Src0) { | 414 void _vmov(Variable *Dest, Operand *Src0) { |
| 415 constexpr CondARM32::Cond Pred = CondARM32::AL; | 415 constexpr CondARM32::Cond Pred = CondARM32::AL; |
| 416 Context.insert(InstARM32Vmov::create(Func, Dest, Src0, Pred)); | 416 Context.insert(InstARM32Vmov::create(Func, Dest, Src0, Pred)); |
| 417 } | 417 } |
| 418 void _vmov(InstARM32Vmov::RegisterPair Dests, Variable *Src0) { | |
| 419 constexpr CondARM32::Cond Pred = CondARM32::AL; | |
| 420 Context.insert(InstARM32Vmov::create(Func, Dests, Src0, Pred)); | |
| 421 Context.insert(InstFakeDef::create(Func, Dests._1)); | |
| 422 } | |
| 423 void _vmov(Variable *Dest, InstARM32Vmov::RegisterPair Srcs) { | |
| 424 constexpr CondARM32::Cond Pred = CondARM32::AL; | |
| 425 Context.insert(InstARM32Vmov::create(Func, Dest, Srcs, Pred)); | |
| 426 } | |
| 418 void _vmul(Variable *Dest, Variable *Src0, Variable *Src1) { | 427 void _vmul(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 419 Context.insert(InstARM32Vmul::create(Func, Dest, Src0, Src1)); | 428 Context.insert(InstARM32Vmul::create(Func, Dest, Src0, Src1)); |
| 420 } | 429 } |
| 421 void _vsqrt(Variable *Dest, Variable *Src, | 430 void _vsqrt(Variable *Dest, Variable *Src, |
| 422 CondARM32::Cond Pred = CondARM32::AL) { | 431 CondARM32::Cond Pred = CondARM32::AL) { |
| 423 Context.insert(InstARM32Vsqrt::create(Func, Dest, Src, Pred)); | 432 Context.insert(InstARM32Vsqrt::create(Func, Dest, Src, Pred)); |
| 424 } | 433 } |
| 425 void _vsub(Variable *Dest, Variable *Src0, Variable *Src1) { | 434 void _vsub(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 426 Context.insert(InstARM32Vsub::create(Func, Dest, Src0, Src1)); | 435 Context.insert(InstARM32Vsub::create(Func, Dest, Src0, Src1)); |
| 427 } | 436 } |
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| 523 | 532 |
| 524 private: | 533 private: |
| 525 ~TargetHeaderARM32() = default; | 534 ~TargetHeaderARM32() = default; |
| 526 | 535 |
| 527 TargetARM32Features CPUFeatures; | 536 TargetARM32Features CPUFeatures; |
| 528 }; | 537 }; |
| 529 | 538 |
| 530 } // end of namespace Ice | 539 } // end of namespace Ice |
| 531 | 540 |
| 532 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H | 541 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H |
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