OLD | NEW |
1 ; Trivial smoke test of bitcast between integer and FP types. | 1 ; Trivial smoke test of bitcast between integer and FP types. |
2 | 2 |
3 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s | 3 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s |
4 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s | 4 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s |
5 | 5 |
| 6 ; RUN: %if --need=allow_dump --need=target_ARM32 --command %p2i --filetype=asm \ |
| 7 ; RUN: --target arm32 -i %s --args -O2 --skip-unimplemented \ |
| 8 ; RUN: | %if --need=allow_dump --need=target_ARM32 --command FileCheck %s \ |
| 9 ; RUN: --check-prefix=ARM32 |
| 10 |
| 11 ; RUN: %if --need=allow_dump --need=target_ARM32 --command %p2i --filetype=asm \ |
| 12 ; RUN: --target arm32 -i %s --args -Om1 --skip-unimplemented \ |
| 13 ; RUN: | %if --need=allow_dump --need=target_ARM32 --command FileCheck %s \ |
| 14 ; RUN: --check-prefix=ARM32 |
| 15 |
6 define internal i32 @cast_f2i(float %f) { | 16 define internal i32 @cast_f2i(float %f) { |
7 entry: | 17 entry: |
8 %v0 = bitcast float %f to i32 | 18 %v0 = bitcast float %f to i32 |
9 ret i32 %v0 | 19 ret i32 %v0 |
10 } | 20 } |
11 ; CHECK-LABEL: cast_f2i | 21 ; CHECK-LABEL: cast_f2i |
12 ; CHECK: mov eax | 22 ; CHECK: mov eax |
| 23 ; ARM32-LABEL: cast_f2i |
| 24 ; ARM32: vmov r{{[0-9]+}}, s{{[0-9]+}} |
13 | 25 |
14 define internal float @cast_i2f(i32 %i) { | 26 define internal float @cast_i2f(i32 %i) { |
15 entry: | 27 entry: |
16 %v0 = bitcast i32 %i to float | 28 %v0 = bitcast i32 %i to float |
17 ret float %v0 | 29 ret float %v0 |
18 } | 30 } |
19 ; CHECK-LABEL: cast_i2f | 31 ; CHECK-LABEL: cast_i2f |
20 ; CHECK: fld DWORD PTR | 32 ; CHECK: fld DWORD PTR |
| 33 ; ARM32-LABEL: cast_i2f |
| 34 ; ARM32: vmov s{{[0-9]+}}, r{{[0-9]+}} |
21 | 35 |
22 define internal i64 @cast_d2ll(double %d) { | 36 define internal i64 @cast_d2ll(double %d) { |
23 entry: | 37 entry: |
24 %v0 = bitcast double %d to i64 | 38 %v0 = bitcast double %d to i64 |
25 ret i64 %v0 | 39 ret i64 %v0 |
26 } | 40 } |
27 ; CHECK-LABEL: cast_d2ll | 41 ; CHECK-LABEL: cast_d2ll |
28 ; CHECK: mov edx | 42 ; CHECK: mov edx |
| 43 ; ARM32-LABEL: cast_d2ll |
| 44 ; ARM32: vmov r{{[0-9]+}}, r{{[0-9]+}}, d{{[0-9]+}} |
29 | 45 |
30 define internal i64 @cast_d2ll_const() { | 46 define internal i64 @cast_d2ll_const() { |
31 entry: | 47 entry: |
32 %v0 = bitcast double 0x12345678901234 to i64 | 48 %v0 = bitcast double 0x12345678901234 to i64 |
33 ret i64 %v0 | 49 ret i64 %v0 |
34 } | 50 } |
35 ; CHECK-LABEL: cast_d2ll_const | 51 ; CHECK-LABEL: cast_d2ll_const |
36 ; CHECK: mov e{{..}},DWORD PTR ds:0x0 {{.*}} .L$double$0 | 52 ; CHECK: mov e{{..}},DWORD PTR ds:0x0 {{.*}} .L$double$0 |
37 ; CHECK: mov e{{..}},DWORD PTR ds:0x4 {{.*}} .L$double$0 | 53 ; CHECK: mov e{{..}},DWORD PTR ds:0x4 {{.*}} .L$double$0 |
| 54 ; ARM32-LABEL: cast_d2ll_const |
| 55 ; ARM32-DAG: movw [[ADDR:r[0-9]+]], #:lower16:.L$ |
| 56 ; ARM32-DAG: movt [[ADDR]], #:upper16:.L$ |
| 57 ; ARM32-DAG: vldr [[DREG:d[0-9]+]], {{\[}}[[ADDR]], #0{{\]}} |
| 58 ; ARM32: vmov r{{[0-9]+}}, r{{[0-9]+}}, [[DREG]] |
38 | 59 |
39 define internal double @cast_ll2d(i64 %ll) { | 60 define internal double @cast_ll2d(i64 %ll) { |
40 entry: | 61 entry: |
41 %v0 = bitcast i64 %ll to double | 62 %v0 = bitcast i64 %ll to double |
42 ret double %v0 | 63 ret double %v0 |
43 } | 64 } |
44 ; CHECK-LABEL: cast_ll2d | 65 ; CHECK-LABEL: cast_ll2d |
45 ; CHECK: fld QWORD PTR | 66 ; CHECK: fld QWORD PTR |
| 67 ; ARM32-LABEL: cast_ll2d |
| 68 ; ARM32: vmov d{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} |
46 | 69 |
47 define internal double @cast_ll2d_const() { | 70 define internal double @cast_ll2d_const() { |
48 entry: | 71 entry: |
49 %v0 = bitcast i64 12345678901234 to double | 72 %v0 = bitcast i64 12345678901234 to double |
50 ret double %v0 | 73 ret double %v0 |
51 } | 74 } |
52 ; CHECK-LABEL: cast_ll2d_const | 75 ; CHECK-LABEL: cast_ll2d_const |
53 ; CHECK: mov {{.*}},0x73ce2ff2 | 76 ; CHECK: mov {{.*}},0x73ce2ff2 |
54 ; CHECK: mov {{.*}},0xb3a | 77 ; CHECK: mov {{.*}},0xb3a |
55 ; CHECK: fld QWORD PTR | 78 ; CHECK: fld QWORD PTR |
| 79 ; ARM32-LABEL: cast_ll2d_const |
| 80 ; ARM32-DAG: movw [[REG0:r[0-9]+]], #12274 |
| 81 ; ARM32-DAG: movt [[REG0:r[0-9]+]], #29646 |
| 82 ; ARM32-DAG: movw [[REG1:r[0-9]+]], #2874 |
| 83 ; ARM32: vmov d{{[0-9]+}}, [[REG0]], [[REG1]] |
OLD | NEW |