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1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===// | 1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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2101 // t2.i32 = vmov t1.fp | 2101 // t2.i32 = vmov t1.fp |
2102 // dest.int = conv t2.i32 @ Truncates the result if needed. | 2102 // dest.int = conv t2.i32 @ Truncates the result if needed. |
2103 // fptoui: | 2103 // fptoui: |
2104 // t1.fp = vcvt src0.fp | 2104 // t1.fp = vcvt src0.fp |
2105 // t2.u32 = vmov t1.fp | 2105 // t2.u32 = vmov t1.fp |
2106 // dest.uint = conv t2.u32 @ Truncates the result if needed. | 2106 // dest.uint = conv t2.u32 @ Truncates the result if needed. |
2107 if (isVectorType(Dest->getType())) { | 2107 if (isVectorType(Dest->getType())) { |
2108 UnimplementedError(Func->getContext()->getFlags()); | 2108 UnimplementedError(Func->getContext()->getFlags()); |
2109 break; | 2109 break; |
2110 } else if (Dest->getType() == IceType_i64) { | 2110 } else if (Dest->getType() == IceType_i64) { |
| 2111 split64(Dest); |
| 2112 Context.insert(InstFakeDef::create(Func, Dest->getLo())); |
| 2113 Context.insert(InstFakeDef::create(Func, Dest->getHi())); |
2111 UnimplementedError(Func->getContext()->getFlags()); | 2114 UnimplementedError(Func->getContext()->getFlags()); |
2112 break; | 2115 break; |
2113 } | 2116 } |
2114 const bool DestIsSigned = CastKind == InstCast::Fptosi; | 2117 const bool DestIsSigned = CastKind == InstCast::Fptosi; |
2115 Variable *Src0R = legalizeToReg(Src0); | 2118 Variable *Src0R = legalizeToReg(Src0); |
2116 Variable *T_fp = makeReg(IceType_f32); | 2119 Variable *T_fp = makeReg(IceType_f32); |
2117 if (isFloat32Asserting32Or64(Src0->getType())) { | 2120 if (isFloat32Asserting32Or64(Src0->getType())) { |
2118 _vcvt(T_fp, Src0R, | 2121 _vcvt(T_fp, Src0R, |
2119 DestIsSigned ? InstARM32Vcvt::S2si : InstARM32Vcvt::S2ui); | 2122 DestIsSigned ? InstARM32Vcvt::S2si : InstARM32Vcvt::S2ui); |
2120 } else { | 2123 } else { |
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2137 // t1.i32 = sext src.int @ sign-extends src0 if needed. | 2140 // t1.i32 = sext src.int @ sign-extends src0 if needed. |
2138 // t2.fp32 = vmov t1.i32 | 2141 // t2.fp32 = vmov t1.i32 |
2139 // t3.fp = vcvt.{fp}.s32 @ fp is either f32 or f64 | 2142 // t3.fp = vcvt.{fp}.s32 @ fp is either f32 or f64 |
2140 // uitofp: | 2143 // uitofp: |
2141 // t1.i32 = zext src.int @ zero-extends src0 if needed. | 2144 // t1.i32 = zext src.int @ zero-extends src0 if needed. |
2142 // t2.fp32 = vmov t1.i32 | 2145 // t2.fp32 = vmov t1.i32 |
2143 // t3.fp = vcvt.{fp}.s32 @ fp is either f32 or f64 | 2146 // t3.fp = vcvt.{fp}.s32 @ fp is either f32 or f64 |
2144 if (isVectorType(Dest->getType())) { | 2147 if (isVectorType(Dest->getType())) { |
2145 UnimplementedError(Func->getContext()->getFlags()); | 2148 UnimplementedError(Func->getContext()->getFlags()); |
2146 break; | 2149 break; |
2147 } else if (Src0->getType() == IceType_i64) { | 2150 } |
| 2151 if (Src0->getType() == IceType_i64) { |
| 2152 // avoid cryptic liveness errors |
| 2153 Context.insert(InstFakeDef::create(Func, Dest)); |
2148 UnimplementedError(Func->getContext()->getFlags()); | 2154 UnimplementedError(Func->getContext()->getFlags()); |
2149 break; | 2155 break; |
2150 } | 2156 } |
2151 const bool SourceIsSigned = CastKind == InstCast::Sitofp; | 2157 const bool SourceIsSigned = CastKind == InstCast::Sitofp; |
2152 if (Src0->getType() != IceType_i32) { | 2158 if (Src0->getType() != IceType_i32) { |
2153 Variable *Src0R_32 = makeReg(IceType_i32); | 2159 Variable *Src0R_32 = makeReg(IceType_i32); |
2154 lowerCast(InstCast::create(Func, SourceIsSigned ? InstCast::Sext | 2160 lowerCast(InstCast::create(Func, SourceIsSigned ? InstCast::Sext |
2155 : InstCast::Zext, | 2161 : InstCast::Zext, |
2156 Src0R_32, Src0)); | 2162 Src0R_32, Src0)); |
2157 Src0 = Src0R_32; | 2163 Src0 = Src0R_32; |
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2171 _mov(Dest, T); | 2177 _mov(Dest, T); |
2172 break; | 2178 break; |
2173 } | 2179 } |
2174 case InstCast::Bitcast: { | 2180 case InstCast::Bitcast: { |
2175 Operand *Src0 = Inst->getSrc(0); | 2181 Operand *Src0 = Inst->getSrc(0); |
2176 if (Dest->getType() == Src0->getType()) { | 2182 if (Dest->getType() == Src0->getType()) { |
2177 InstAssign *Assign = InstAssign::create(Func, Dest, Src0); | 2183 InstAssign *Assign = InstAssign::create(Func, Dest, Src0); |
2178 lowerAssign(Assign); | 2184 lowerAssign(Assign); |
2179 return; | 2185 return; |
2180 } | 2186 } |
2181 UnimplementedError(Func->getContext()->getFlags()); | 2187 Type DestType = Dest->getType(); |
| 2188 switch (DestType) { |
| 2189 case IceType_NUM: |
| 2190 case IceType_void: |
| 2191 llvm::report_fatal_error("Unexpected bitcast."); |
| 2192 case IceType_i1: |
| 2193 UnimplementedError(Func->getContext()->getFlags()); |
| 2194 break; |
| 2195 case IceType_v4i1: |
| 2196 UnimplementedError(Func->getContext()->getFlags()); |
| 2197 break; |
| 2198 case IceType_i8: |
| 2199 UnimplementedError(Func->getContext()->getFlags()); |
| 2200 break; |
| 2201 case IceType_i16: |
| 2202 UnimplementedError(Func->getContext()->getFlags()); |
| 2203 break; |
| 2204 case IceType_i32: |
| 2205 case IceType_f32: { |
| 2206 Variable *Src0R = legalizeToReg(Src0); |
| 2207 Variable *T = makeReg(DestType); |
| 2208 _vmov(T, Src0R); |
| 2209 lowerAssign(InstAssign::create(Func, Dest, T)); |
| 2210 break; |
| 2211 } |
| 2212 case IceType_i64: { |
| 2213 // t0, t1 <- src0 |
| 2214 // dest[31..0] = t0 |
| 2215 // dest[63..32] = t1 |
| 2216 assert(Src0->getType() == IceType_f64); |
| 2217 Variable *T0 = makeReg(IceType_i32); |
| 2218 Variable *T1 = makeReg(IceType_i32); |
| 2219 Variable *Src0R = legalizeToReg(Src0); |
| 2220 split64(Dest); |
| 2221 _vmov(InstARM32Vmov::RegisterPair(T0, T1), Src0R); |
| 2222 lowerAssign(InstAssign::create(Func, Dest->getLo(), T0)); |
| 2223 lowerAssign(InstAssign::create(Func, Dest->getHi(), T1)); |
| 2224 break; |
| 2225 } |
| 2226 case IceType_f64: { |
| 2227 // T0 <- lo(src) |
| 2228 // T1 <- hi(src) |
| 2229 // vmov T2, T0, T1 |
| 2230 // Dest <- T2 |
| 2231 assert(Src0->getType() == IceType_i64); |
| 2232 Variable *SrcLo = legalizeToReg(loOperand(Src0)); |
| 2233 Variable *SrcHi = legalizeToReg(hiOperand(Src0)); |
| 2234 Variable *T = makeReg(IceType_f64); |
| 2235 _vmov(T, InstARM32Vmov::RegisterPair(SrcLo, SrcHi)); |
| 2236 lowerAssign(InstAssign::create(Func, Dest, T)); |
| 2237 break; |
| 2238 } |
| 2239 case IceType_v8i1: |
| 2240 UnimplementedError(Func->getContext()->getFlags()); |
| 2241 break; |
| 2242 case IceType_v16i1: |
| 2243 UnimplementedError(Func->getContext()->getFlags()); |
| 2244 break; |
| 2245 case IceType_v8i16: |
| 2246 UnimplementedError(Func->getContext()->getFlags()); |
| 2247 break; |
| 2248 case IceType_v16i8: |
| 2249 UnimplementedError(Func->getContext()->getFlags()); |
| 2250 break; |
| 2251 case IceType_v4i32: |
| 2252 UnimplementedError(Func->getContext()->getFlags()); |
| 2253 break; |
| 2254 case IceType_v4f32: |
| 2255 UnimplementedError(Func->getContext()->getFlags()); |
| 2256 break; |
| 2257 } |
2182 break; | 2258 break; |
2183 } | 2259 } |
2184 } | 2260 } |
2185 } | 2261 } |
2186 | 2262 |
2187 void TargetARM32::lowerExtractElement(const InstExtractElement *Inst) { | 2263 void TargetARM32::lowerExtractElement(const InstExtractElement *Inst) { |
2188 (void)Inst; | 2264 (void)Inst; |
2189 UnimplementedError(Func->getContext()->getFlags()); | 2265 UnimplementedError(Func->getContext()->getFlags()); |
2190 } | 2266 } |
2191 | 2267 |
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3129 << ".eabi_attribute 68, 1 @ Tag_Virtualization_use\n"; | 3205 << ".eabi_attribute 68, 1 @ Tag_Virtualization_use\n"; |
3130 if (CPUFeatures.hasFeature(TargetARM32Features::HWDivArm)) { | 3206 if (CPUFeatures.hasFeature(TargetARM32Features::HWDivArm)) { |
3131 Str << ".eabi_attribute 44, 2 @ Tag_DIV_use\n"; | 3207 Str << ".eabi_attribute 44, 2 @ Tag_DIV_use\n"; |
3132 } | 3208 } |
3133 // Technically R9 is used for TLS with Sandboxing, and we reserve it. | 3209 // Technically R9 is used for TLS with Sandboxing, and we reserve it. |
3134 // However, for compatibility with current NaCl LLVM, don't claim that. | 3210 // However, for compatibility with current NaCl LLVM, don't claim that. |
3135 Str << ".eabi_attribute 14, 3 @ Tag_ABI_PCS_R9_use: Not used\n"; | 3211 Str << ".eabi_attribute 14, 3 @ Tag_ABI_PCS_R9_use: Not used\n"; |
3136 } | 3212 } |
3137 | 3213 |
3138 } // end of namespace Ice | 3214 } // end of namespace Ice |
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