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Unified Diff: runtime/vm/instructions_arm64.cc

Issue 1343373003: Revert "VM: New calling convention for generated code." (Closed) Base URL: git@github.com:dart-lang/sdk.git@master
Patch Set: Created 5 years, 3 months ago
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Index: runtime/vm/instructions_arm64.cc
diff --git a/runtime/vm/instructions_arm64.cc b/runtime/vm/instructions_arm64.cc
index 62b3ff224b97eea38d1c06a94e3c9d5031e4ecea..59da8d5ff247b14e4eacf41721ad77c8b764d7f3 100644
--- a/runtime/vm/instructions_arm64.cc
+++ b/runtime/vm/instructions_arm64.cc
@@ -17,7 +17,7 @@ CallPattern::CallPattern(uword pc, const Code& code)
: object_pool_(ObjectPool::Handle(code.GetObjectPool())),
end_(pc),
ic_data_load_end_(0),
- target_code_pool_index_(-1),
+ target_address_pool_index_(-1),
ic_data_(ICData::Handle()) {
ASSERT(code.ContainsInstructionAt(pc));
// Last instruction: blr ip0.
@@ -25,10 +25,10 @@ CallPattern::CallPattern(uword pc, const Code& code)
Register reg;
ic_data_load_end_ =
- InstructionPattern::DecodeLoadWordFromPool(end_ - 2 * Instr::kInstrSize,
+ InstructionPattern::DecodeLoadWordFromPool(end_ - Instr::kInstrSize,
&reg,
- &target_code_pool_index_);
- ASSERT(reg == CODE_REG);
+ &target_address_pool_index_);
+ ASSERT(reg == IP0);
}
@@ -36,17 +36,17 @@ NativeCallPattern::NativeCallPattern(uword pc, const Code& code)
: object_pool_(ObjectPool::Handle(code.GetObjectPool())),
end_(pc),
native_function_pool_index_(-1),
- target_code_pool_index_(-1) {
+ target_address_pool_index_(-1) {
ASSERT(code.ContainsInstructionAt(pc));
// Last instruction: blr ip0.
ASSERT(*(reinterpret_cast<uint32_t*>(end_) - 1) == 0xd63f0200);
Register reg;
uword native_function_load_end =
- InstructionPattern::DecodeLoadWordFromPool(end_ - 2 * Instr::kInstrSize,
+ InstructionPattern::DecodeLoadWordFromPool(end_ - Instr::kInstrSize,
&reg,
- &target_code_pool_index_);
- ASSERT(reg == CODE_REG);
+ &target_address_pool_index_);
+ ASSERT(reg == IP0);
InstructionPattern::DecodeLoadWordFromPool(native_function_load_end,
&reg,
&native_function_pool_index_);
@@ -54,14 +54,13 @@ NativeCallPattern::NativeCallPattern(uword pc, const Code& code)
}
-RawCode* NativeCallPattern::target() const {
- return reinterpret_cast<RawCode*>(
- object_pool_.ObjectAt(target_code_pool_index_));
+uword NativeCallPattern::target() const {
+ return object_pool_.RawValueAt(target_address_pool_index_);
}
-void NativeCallPattern::set_target(const Code& target) const {
- object_pool_.SetObjectAt(target_code_pool_index_, target);
+void NativeCallPattern::set_target(uword target_address) const {
+ object_pool_.SetRawValueAt(target_address_pool_index_, target_address);
// No need to flush the instruction cache, since the code is not modified.
}
@@ -293,19 +292,18 @@ RawICData* CallPattern::IcData() {
}
-RawCode* CallPattern::TargetCode() const {
- return reinterpret_cast<RawCode*>(
- object_pool_.ObjectAt(target_code_pool_index_));
+uword CallPattern::TargetAddress() const {
+ return object_pool_.RawValueAt(target_address_pool_index_);
}
-void CallPattern::SetTargetCode(const Code& target) const {
- object_pool_.SetObjectAt(target_code_pool_index_, target);
+void CallPattern::SetTargetAddress(uword target_address) const {
+ object_pool_.SetRawValueAt(target_address_pool_index_, target_address);
// No need to flush the instruction cache, since the code is not modified.
}
-void CallPattern::InsertDeoptCallAt(uword pc, uword target_address) {
+void CallPattern::InsertAt(uword pc, uword target_address) {
Instr* movz0 = Instr::At(pc + (0 * Instr::kInstrSize));
Instr* movk1 = Instr::At(pc + (1 * Instr::kInstrSize));
Instr* movk2 = Instr::At(pc + (2 * Instr::kInstrSize));
@@ -324,8 +322,68 @@ void CallPattern::InsertDeoptCallAt(uword pc, uword target_address) {
movk3->SetMoveWideBits(MOVK, IP0, h3, 3, kDoubleWord);
blr->SetUnconditionalBranchRegBits(BLR, IP0);
- ASSERT(kDeoptCallLengthInBytes == 5 * Instr::kInstrSize);
- CPU::FlushICache(pc, kDeoptCallLengthInBytes);
+ ASSERT(kLengthInBytes == 5 * Instr::kInstrSize);
+ CPU::FlushICache(pc, kLengthInBytes);
+}
+
+
+JumpPattern::JumpPattern(uword pc, const Code& code) : pc_(pc) { }
+
+
+bool JumpPattern::IsValid() const {
+ Instr* movz0 = Instr::At(pc_ + (0 * Instr::kInstrSize));
+ Instr* movk1 = Instr::At(pc_ + (1 * Instr::kInstrSize));
+ Instr* movk2 = Instr::At(pc_ + (2 * Instr::kInstrSize));
+ Instr* movk3 = Instr::At(pc_ + (3 * Instr::kInstrSize));
+ Instr* br = Instr::At(pc_ + (4 * Instr::kInstrSize));
+ return (movz0->IsMoveWideOp()) && (movz0->Bits(29, 2) == 2) &&
+ (movk1->IsMoveWideOp()) && (movk1->Bits(29, 2) == 3) &&
+ (movk2->IsMoveWideOp()) && (movk2->Bits(29, 2) == 3) &&
+ (movk3->IsMoveWideOp()) && (movk3->Bits(29, 2) == 3) &&
+ (br->IsUnconditionalBranchRegOp()) && (br->Bits(16, 5) == 31);
+}
+
+
+uword JumpPattern::TargetAddress() const {
+ Instr* movz0 = Instr::At(pc_ + (0 * Instr::kInstrSize));
+ Instr* movk1 = Instr::At(pc_ + (1 * Instr::kInstrSize));
+ Instr* movk2 = Instr::At(pc_ + (2 * Instr::kInstrSize));
+ Instr* movk3 = Instr::At(pc_ + (3 * Instr::kInstrSize));
+ const uint16_t imm0 = movz0->Imm16Field();
+ const uint16_t imm1 = movk1->Imm16Field();
+ const uint16_t imm2 = movk2->Imm16Field();
+ const uint16_t imm3 = movk3->Imm16Field();
+ const int64_t target =
+ (static_cast<int64_t>(imm0)) |
+ (static_cast<int64_t>(imm1) << 16) |
+ (static_cast<int64_t>(imm2) << 32) |
+ (static_cast<int64_t>(imm3) << 48);
+ return target;
+}
+
+
+void JumpPattern::SetTargetAddress(uword target_address) const {
+ Instr* movz0 = Instr::At(pc_ + (0 * Instr::kInstrSize));
+ Instr* movk1 = Instr::At(pc_ + (1 * Instr::kInstrSize));
+ Instr* movk2 = Instr::At(pc_ + (2 * Instr::kInstrSize));
+ Instr* movk3 = Instr::At(pc_ + (3 * Instr::kInstrSize));
+ const int32_t movz0_bits = movz0->InstructionBits();
+ const int32_t movk1_bits = movk1->InstructionBits();
+ const int32_t movk2_bits = movk2->InstructionBits();
+ const int32_t movk3_bits = movk3->InstructionBits();
+
+ const uint32_t w0 = Utils::Low32Bits(target_address);
+ const uint32_t w1 = Utils::High32Bits(target_address);
+ const uint16_t h0 = Utils::Low16Bits(w0);
+ const uint16_t h1 = Utils::High16Bits(w0);
+ const uint16_t h2 = Utils::Low16Bits(w1);
+ const uint16_t h3 = Utils::High16Bits(w1);
+
+ movz0->SetInstructionBits((movz0_bits & ~kImm16Mask) | (h0 << kImm16Shift));
+ movk1->SetInstructionBits((movk1_bits & ~kImm16Mask) | (h1 << kImm16Shift));
+ movk2->SetInstructionBits((movk2_bits & ~kImm16Mask) | (h2 << kImm16Shift));
+ movk3->SetInstructionBits((movk3_bits & ~kImm16Mask) | (h3 << kImm16Shift));
+ CPU::FlushICache(pc_, 4 * Instr::kInstrSize);
}
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