Revert "VM: New calling convention for generated code."

runtime/vm/assembler_arm.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_ASSEMBLER_ARM_H_
 #define VM_ASSEMBLER_ARM_H_
 
 #ifndef VM_ASSEMBLER_H_
 #error Do not include assembler_arm.h directly; use assembler.h instead.
 #endif
@@ skipping 588 matching lines @@
   // The words of qd and qm are interleaved with the low words of the result
   // in qd and the high words in qm.
   void vzipqw(QRegister qd, QRegister qm);
 
   // Branch instructions.
   void b(Label* label, Condition cond = AL);
   void bl(Label* label, Condition cond = AL);
   void bx(Register rm, Condition cond = AL);
   void blx(Register rm, Condition cond = AL);
 
-  void Branch(const StubEntry& stub_entry,
-              Patchability patchable = kNotPatchable,
-              Register pp = PP,
-              Condition cond = AL);
+  // Macros.
+  // Branch to an entry address. Call sequence is never patched.
+  void Branch(const StubEntry& stub_entry, Condition cond = AL);
+
+  // Branch to an entry address. Call sequence can be patched or even replaced.
+  void BranchPatchable(const StubEntry& stub_entry);
 
   void BranchLink(const StubEntry& stub_entry,
                   Patchability patchable = kNotPatchable);
-  void BranchLink(const Code& code, Patchability patchable);
+  void BranchLink(const ExternalLabel* label, Patchability patchable);
 
   // Branch and link to an entry address. Call sequence can be patched.
   void BranchLinkPatchable(const StubEntry& stub_entry);
-  void BranchLinkPatchable(const Code& code);
 
   // Branch and link to [base + offset]. Call sequence is never patched.
   void BranchLinkOffset(Register base, int32_t offset);
 
   // Add signed immediate value to rd. May clobber IP.
   void AddImmediate(Register rd, int32_t value, Condition cond = AL);
   void AddImmediate(Register rd, Register rn, int32_t value,
                     Condition cond = AL);
   void AddImmediateSetFlags(Register rd, Register rn, int32_t value,
                             Condition cond = AL);
@@ skipping 22 matching lines @@
   void LoadImmediate(Register rd, int32_t value, Condition cond = AL);
   // These two may clobber IP.
   void LoadSImmediate(SRegister sd, float value, Condition cond = AL);
   void LoadDImmediate(DRegister dd, double value,
                       Register scratch, Condition cond = AL);
 
   void MarkExceptionHandler(Label* label);
 
   void Drop(intptr_t stack_elements);
 
-  void RestoreCodePointer();
-  void LoadPoolPointer(Register reg = PP);
+  void LoadPoolPointer();
 
   void LoadIsolate(Register rd);
 
   void LoadObject(Register rd, const Object& object, Condition cond = AL);
   void LoadUniqueObject(Register rd, const Object& object, Condition cond = AL);
   void LoadExternalLabel(Register dst,
                          const ExternalLabel* label,
                          Patchability patchable,
                          Condition cond = AL);
-  void LoadFunctionFromCalleePool(Register dst,
-                                  const Function& function,
-                                  Register new_pp);
   void LoadNativeEntry(Register dst,
                        const ExternalLabel* label,
                        Patchability patchable,
                        Condition cond = AL);
   void PushObject(const Object& object);
   void CompareObject(Register rn, const Object& object);
 
   // When storing into a heap object field, knowledge of the previous content
   // is expressed through these constants.
   enum FieldContent {
@@ skipping 180 matching lines @@
   // Untag the value in the register assuming it is a smi.
   // Untagging shifts tag bit into the carry flag - if carry is clear
   // assumption was correct. In this case jump to the is_smi label.
   // Otherwise fall-through.
   void SmiUntag(Register dst, Register src, Label* is_smi) {
     ASSERT(kSmiTagSize == 1);
     Asrs(dst, src, Operand(kSmiTagSize));
     b(is_smi, CC);
   }
 
-  void CheckCodePointer();
-
   // Function frame setup and tear down.
   void EnterFrame(RegList regs, intptr_t frame_space);
   void LeaveFrame(RegList regs);
   void Ret();
   void ReserveAlignedFrameSpace(intptr_t frame_space);
 
   // Create a frame for calling into runtime that preserves all volatile
   // registers.  Frame's SP is guaranteed to be correctly aligned and
   // frame_space bytes are reserved under it.
   void EnterCallRuntimeFrame(intptr_t frame_space);
   void LeaveCallRuntimeFrame();
 
   void CallRuntime(const RuntimeEntry& entry, intptr_t argument_count);
 
   // Set up a Dart frame on entry with a frame pointer and PC information to
   // enable easy access to the RawInstruction object of code corresponding
   // to this frame.
   void EnterDartFrame(intptr_t frame_size);
-  void LeaveDartFrame(RestorePP restore_pp = kRestoreCallerPP);
+  void LeaveDartFrame();
 
   // Set up a Dart frame for a function compiled for on-stack replacement.
   // The frame layout is a normal Dart frame, but the frame is partially set
   // up on entry (it is the frame of the unoptimized code).
   void EnterOsrFrame(intptr_t extra_size);
 
   // Set up a stub frame so that the stack traversal code can easily identify
   // a stub frame.
   void EnterStubFrame();
   void LeaveStubFrame();
 
+  // Instruction pattern from entrypoint is used in Dart frame prologs
+  // to set up the frame and save a PC which can be used to figure out the
+  // RawInstruction object corresponding to the code running in the frame.
+  static intptr_t EntryPointToPcMarkerOffset() {
+    return TargetCPUFeatures::store_pc_read_offset();
+  }
+
   // The register into which the allocation stats table is loaded with
   // LoadAllocationStatsAddress should be passed to
   // IncrementAllocationStats(WithSize) as stats_addr_reg to update the
   // allocation stats. These are separate assembler macros so we can
   // avoid a dependent load too nearby the load of the table address.
   void LoadAllocationStatsAddress(Register dest,
                                   intptr_t cid,
                                   bool inline_isolate = true);
   void IncrementAllocationStats(Register stats_addr,
                                 intptr_t cid,
@@ skipping 65 matching lines @@
   bool use_far_branches_;
 
   // If you are thinking of using one or both of these instructions directly,
   // instead LoadImmediate should probably be used.
   void movw(Register rd, uint16_t imm16, Condition cond = AL);
   void movt(Register rd, uint16_t imm16, Condition cond = AL);
 
   void BindARMv6(Label* label);
   void BindARMv7(Label* label);
 
-  void LoadWordFromPoolOffset(Register rd,
-                              int32_t offset,
-                              Register pp,
-                              Condition cond);
+  void BranchLink(const ExternalLabel* label);
 
-  void BranchLink(const ExternalLabel* label);
+  void LoadWordFromPoolOffset(Register rd, int32_t offset, Condition cond);
 
   class CodeComment : public ZoneAllocated {
    public:
     CodeComment(intptr_t pc_offset, const String& comment)
         : pc_offset_(pc_offset), comment_(comment) { }
 
     intptr_t pc_offset() const { return pc_offset_; }
     const String& comment() const { return comment_; }
 
    private:
     intptr_t pc_offset_;
     const String& comment_;
 
     DISALLOW_COPY_AND_ASSIGN(CodeComment);
   };
 
   GrowableArray<CodeComment*> comments_;
 
   bool constant_pool_allowed_;
 
   void LoadObjectHelper(Register rd,
                         const Object& object,
                         Condition cond,
-                        bool is_unique,
-                        Register pp);
+                        bool is_unique);
 
   void EmitType01(Condition cond,
                   int type,
                   Opcode opcode,
                   int set_cc,
                   Register rn,
                   Register rd,
                   Operand o);
 
   void EmitType5(Condition cond, int32_t offset, bool link);
@@ skipping 116 matching lines @@
                      Register new_value,
                      FieldContent old_content);
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_ARM_H_