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src/IceRegistersARM32.h

 //===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// This file declares the registers and their encodings for ARM32.
 ///
 //===----------------------------------------------------------------------===//
 
 #ifndef SUBZERO_SRC_ICEREGISTERSARM32_H
 #define SUBZERO_SRC_ICEREGISTERSARM32_H
 
 #include "IceDefs.h"
 #include "IceInstARM32.def"
 #include "IceTypes.h"
 
 namespace Ice {
 
 class RegARM32 {
 public:
-  /// An enum of every register. The enum value may not match the encoding
-  /// used to binary encode register operands in instructions.
+  /// An enum of every register. The enum value may not match the encoding used
+  /// to binary encode register operands in instructions.
   enum AllRegisters {
 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
           isFP32, isFP64, isVec128, alias_init)                                \
   val,
     REGARM32_TABLE
 #undef X
         Reg_NUM,
 #define X(val, init) val init,
     REGARM32_TABLE_BOUNDS
 #undef X
   };
 
-  /// An enum of GPR Registers. The enum value does match the encoding used
-  /// to binary encode register operands in instructions.
+  /// An enum of GPR Registers. The enum value does match the encoding used to
+  /// binary encode register operands in instructions.
   enum GPRRegister {
 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt,    \
           isFP32, isFP64, isVec128, alias_init)                                \
   Encoded_##val = encode,
     REGARM32_GPR_TABLE
 #undef X
         Encoded_Not_GPR = -1
   };
 
   /// An enum of FP32 S-Registers. The enum value does match the encoding used
@@ skipping 50 matching lines @@
   static inline QRegister getEncodedQReg(int32_t RegNum) {
     assert(Reg_QREG_First <= RegNum);
     assert(RegNum <= Reg_QREG_Last);
     return QRegister(RegNum - Reg_QREG_First);
   }
 };
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEREGISTERSARM32_H