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Side by Side Diff: src/IceInstMIPS32.h

Issue 1341423002: Reflow comments to use the full width. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix spelling and rebase Created 5 years, 3 months ago
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1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== // 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== //
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
11 /// This file declares the InstMIPS32 and OperandMIPS32 classes and 11 /// This file declares the InstMIPS32 and OperandMIPS32 classes and their
12 /// their subclasses. This represents the machine instructions and 12 /// subclasses. This represents the machine instructions and operands used for
13 /// operands used for MIPS32 code selection. 13 /// MIPS32 code selection.
14 /// 14 ///
15 //===----------------------------------------------------------------------===// 15 //===----------------------------------------------------------------------===//
16 16
17 #ifndef SUBZERO_SRC_ICEINSTMIPS32_H 17 #ifndef SUBZERO_SRC_ICEINSTMIPS32_H
18 #define SUBZERO_SRC_ICEINSTMIPS32_H 18 #define SUBZERO_SRC_ICEINSTMIPS32_H
19 19
20 #include "IceDefs.h" 20 #include "IceDefs.h"
21 #include "IceInst.h" 21 #include "IceInst.h"
22 #include "IceInstMIPS32.def" 22 #include "IceInstMIPS32.def"
23 #include "IceOperand.h" 23 #include "IceOperand.h"
(...skipping 16 matching lines...) Expand all
40 void dump(const Cfg *Func) const override; 40 void dump(const Cfg *Func) const override;
41 41
42 protected: 42 protected:
43 InstMIPS32(Cfg *Func, InstKindMIPS32 Kind, SizeT Maxsrcs, Variable *Dest) 43 InstMIPS32(Cfg *Func, InstKindMIPS32 Kind, SizeT Maxsrcs, Variable *Dest)
44 : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {} 44 : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {}
45 static bool isClassof(const Inst *Inst, InstKindMIPS32 MyKind) { 45 static bool isClassof(const Inst *Inst, InstKindMIPS32 MyKind) {
46 return Inst->getKind() == static_cast<InstKind>(MyKind); 46 return Inst->getKind() == static_cast<InstKind>(MyKind);
47 } 47 }
48 }; 48 };
49 49
50 /// Ret pseudo-instruction. This is actually a "jr" instruction with 50 /// Ret pseudo-instruction. This is actually a "jr" instruction with an "ra"
51 /// an "ra" register operand, but epilogue lowering will search for a Ret 51 /// register operand, but epilogue lowering will search for a Ret instead of a
52 /// instead of a generic "jr". This instruction also takes a Source 52 /// generic "jr". This instruction also takes a Source operand (for non-void
53 /// operand (for non-void returning functions) for liveness analysis, though 53 /// returning functions) for liveness analysis, though a FakeUse before the ret
54 /// a FakeUse before the ret would do just as well. 54 /// would do just as well.
55 /// TODO(reed kotler): This needs was take from the ARM port and needs to be 55 // TODO(reed kotler): This needs was take from the ARM port and needs to be
56 /// scrubbed in the future. 56 // scrubbed in the future.
57 class InstMIPS32Ret : public InstMIPS32 { 57 class InstMIPS32Ret : public InstMIPS32 {
58 58
59 InstMIPS32Ret() = delete; 59 InstMIPS32Ret() = delete;
60 InstMIPS32Ret(const InstMIPS32Ret &) = delete; 60 InstMIPS32Ret(const InstMIPS32Ret &) = delete;
61 InstMIPS32Ret &operator=(const InstMIPS32Ret &) = delete; 61 InstMIPS32Ret &operator=(const InstMIPS32Ret &) = delete;
62 62
63 public: 63 public:
64 static InstMIPS32Ret *create(Cfg *Func, Variable *RA, 64 static InstMIPS32Ret *create(Cfg *Func, Variable *RA,
65 Variable *Source = nullptr) { 65 Variable *Source = nullptr) {
66 return new (Func->allocate<InstMIPS32Ret>()) 66 return new (Func->allocate<InstMIPS32Ret>())
67 InstMIPS32Ret(Func, RA, Source); 67 InstMIPS32Ret(Func, RA, Source);
68 } 68 }
69 void emit(const Cfg *Func) const override; 69 void emit(const Cfg *Func) const override;
70 void emitIAS(const Cfg *Func) const override; 70 void emitIAS(const Cfg *Func) const override;
71 void dump(const Cfg *Func) const override; 71 void dump(const Cfg *Func) const override;
72 static bool classof(const Inst *Inst) { return isClassof(Inst, Ret); } 72 static bool classof(const Inst *Inst) { return isClassof(Inst, Ret); }
73 73
74 private: 74 private:
75 InstMIPS32Ret(Cfg *Func, Variable *RA, Variable *Source); 75 InstMIPS32Ret(Cfg *Func, Variable *RA, Variable *Source);
76 }; 76 };
77 77
78 } // end of namespace Ice 78 } // end of namespace Ice
79 79
80 #endif // SUBZERO_SRC_ICEINSTMIPS32_H 80 #endif // SUBZERO_SRC_ICEINSTMIPS32_H
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