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Unified Diff: src/IceAssemblerX86BaseImpl.h

Issue 1339603006: Subzero: Generate correct code for shifts by a large immediate. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Change comment Created 5 years, 3 months ago
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Index: src/IceAssemblerX86BaseImpl.h
diff --git a/src/IceAssemblerX86BaseImpl.h b/src/IceAssemblerX86BaseImpl.h
index ad5d13abaa1be39dd1dca19bb2eabfbe0f840323..f449dae9f665fd165feb968d96c080508009a5b6 100644
--- a/src/IceAssemblerX86BaseImpl.h
+++ b/src/IceAssemblerX86BaseImpl.h
@@ -3371,7 +3371,10 @@ template <class Machine>
void AssemblerX86Base<Machine>::emitGenericShift(
int rm, Type Ty, typename Traits::GPRRegister reg, const Immediate &imm) {
AssemblerBuffer::EnsureCapacity ensured(&Buffer);
- assert(imm.is_int8());
+ // We don't assert that imm fits into 8 bits; instead, it gets masked below.
+ // Note that we don't mask it further (e.g. to 5 bits) because we want the
+ // same processor behavior regardless of whether it's an immediate (masked to
+ // 8 bits) or in register cl (essentially ecx masked to 8 bits).
if (Ty == IceType_i16)
emitOperandSizeOverride();
emitRexB(Ty, reg);
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