Subzero: Generate correct code for shifts by a large immediate.

tests_lit/llvm2ice_tests/shift.ll

 ; This is a test of C-level conversion operations that clang lowers
 ; into pairs of shifts.
 
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 -i %s --args -O2 \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
 
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 -i %s --args -Om1 \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
@@ skipping 46 matching lines @@
   store i32 %v1, i32* %__4, align 1
   ret void
 }
 ; CHECK-LABEL: conv2
 ; CHECK: shl {{.*}},0x10
 ; CHECK: shr {{.*}},0x10
 
 ; ARM32-LABEL: conv2
 ; ARM32: lsl {{.*}}, #16
 ; ARM32: lsr {{.*}}, #16
+
+define i32 @shlImmLarge(i32 %val) {
+entry:
+  %result = shl i32 %val, 257
+  ret i32 %result
+}
+; CHECK-LABEL: shlImmLarge
+; CHECK: shl {{.*}},0x1
+
+define i32 @shlImmNeg(i32 %val) {
+entry:
+  %result = shl i32 %val, -1
+  ret i32 %result
+}
+; CHECK-LABEL: shlImmNeg
+; CHECK: shl {{.*}},0xff
+
+define i32 @lshrImmLarge(i32 %val) {
+entry:
+  %result = lshr i32 %val, 257
+  ret i32 %result
+}
+; CHECK-LABEL: lshrImmLarge
+; CHECK: shr {{.*}},0x1
+
+define i32 @lshrImmNeg(i32 %val) {
+entry:
+  %result = lshr i32 %val, -1
+  ret i32 %result
+}
+; CHECK-LABEL: lshrImmNeg
+; CHECK: shr {{.*}},0xff
+
+define i32 @ashrImmLarge(i32 %val) {
+entry:
+  %result = ashr i32 %val, 257
+  ret i32 %result
+}
+; CHECK-LABEL: ashrImmLarge
+; CHECK: sar {{.*}},0x1
+
+define i32 @ashrImmNeg(i32 %val) {
+entry:
+  %result = ashr i32 %val, -1
+  ret i32 %result
+}
+; CHECK-LABEL: ashrImmNeg
+; CHECK: sar {{.*}},0xff