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1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. | 1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef CONTENT_COMMON_GPU_GPU_CHANNEL_H_ | 5 #ifndef CONTENT_COMMON_GPU_GPU_CHANNEL_H_ |
6 #define CONTENT_COMMON_GPU_GPU_CHANNEL_H_ | 6 #define CONTENT_COMMON_GPU_GPU_CHANNEL_H_ |
7 | 7 |
8 #include <string> | 8 #include <string> |
9 | 9 |
10 #include "base/containers/hash_tables.h" | 10 #include "base/containers/hash_tables.h" |
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29 #include "ui/gl/gpu_preference.h" | 29 #include "ui/gl/gpu_preference.h" |
30 | 30 |
31 struct GPUCreateCommandBufferConfig; | 31 struct GPUCreateCommandBufferConfig; |
32 | 32 |
33 namespace base { | 33 namespace base { |
34 class WaitableEvent; | 34 class WaitableEvent; |
35 } | 35 } |
36 | 36 |
37 namespace gpu { | 37 namespace gpu { |
38 class PreemptionFlag; | 38 class PreemptionFlag; |
| 39 class SyncPointClientState; |
39 class SyncPointManager; | 40 class SyncPointManager; |
40 union ValueState; | 41 union ValueState; |
41 class ValueStateMap; | 42 class ValueStateMap; |
42 namespace gles2 { | 43 namespace gles2 { |
43 class SubscriptionRefSet; | 44 class SubscriptionRefSet; |
44 } | 45 } |
45 } | 46 } |
46 | 47 |
47 namespace IPC { | 48 namespace IPC { |
48 class MessageFilter; | 49 class MessageFilter; |
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159 const gpu::ValueState& state); | 160 const gpu::ValueState& state); |
160 | 161 |
161 // Visible for testing. | 162 // Visible for testing. |
162 const gpu::ValueStateMap* pending_valuebuffer_state() const { | 163 const gpu::ValueStateMap* pending_valuebuffer_state() const { |
163 return pending_valuebuffer_state_.get(); | 164 return pending_valuebuffer_state_.get(); |
164 } | 165 } |
165 | 166 |
166 // Visible for testing. | 167 // Visible for testing. |
167 GpuChannelMessageFilter* filter() const { return filter_.get(); } | 168 GpuChannelMessageFilter* filter() const { return filter_.get(); } |
168 | 169 |
169 // Returns the global order number of the IPC message that started processing | |
170 // last. | |
171 uint32_t current_order_num() const { return current_order_num_; } | |
172 | |
173 // Returns the global order number for the last processed IPC message. | 170 // Returns the global order number for the last processed IPC message. |
174 uint32_t GetProcessedOrderNum() const; | 171 uint32_t GetProcessedOrderNum() const; |
175 | 172 |
176 // Returns the global order number for the last unprocessed IPC message. | 173 // Returns the global order number for the last unprocessed IPC message. |
177 uint32_t GetUnprocessedOrderNum() const; | 174 uint32_t GetUnprocessedOrderNum() const; |
178 | 175 |
| 176 // Returns the shared sync point client state. |
| 177 scoped_refptr<gpu::SyncPointClientState> GetSyncPointClientState(); |
| 178 |
179 void HandleMessage(); | 179 void HandleMessage(); |
180 | 180 |
181 // Some messages such as WaitForGetOffsetInRange and WaitForTokenInRange are | 181 // Some messages such as WaitForGetOffsetInRange and WaitForTokenInRange are |
182 // processed as soon as possible because the client is blocked until they | 182 // processed as soon as possible because the client is blocked until they |
183 // are completed. | 183 // are completed. |
184 void HandleOutOfOrderMessage(const IPC::Message& msg); | 184 void HandleOutOfOrderMessage(const IPC::Message& msg); |
185 | 185 |
186 protected: | 186 protected: |
187 // The message filter on the io thread. | 187 // The message filter on the io thread. |
188 scoped_refptr<GpuChannelMessageFilter> filter_; | 188 scoped_refptr<GpuChannelMessageFilter> filter_; |
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272 | 272 |
273 gpu::gles2::DisallowedFeatures disallowed_features_; | 273 gpu::gles2::DisallowedFeatures disallowed_features_; |
274 GpuWatchdog* watchdog_; | 274 GpuWatchdog* watchdog_; |
275 bool software_; | 275 bool software_; |
276 | 276 |
277 size_t num_stubs_descheduled_; | 277 size_t num_stubs_descheduled_; |
278 | 278 |
279 // Map of stream id to stream state. | 279 // Map of stream id to stream state. |
280 base::hash_map<int32, StreamState> streams_; | 280 base::hash_map<int32, StreamState> streams_; |
281 | 281 |
282 uint32_t current_order_num_; | |
283 | |
284 bool allow_future_sync_points_; | 282 bool allow_future_sync_points_; |
285 bool allow_real_time_streams_; | 283 bool allow_real_time_streams_; |
286 | 284 |
287 // Member variables should appear before the WeakPtrFactory, to ensure | 285 // Member variables should appear before the WeakPtrFactory, to ensure |
288 // that any WeakPtrs to Controller are invalidated before its members | 286 // that any WeakPtrs to Controller are invalidated before its members |
289 // variable's destructors are executed, rendering them invalid. | 287 // variable's destructors are executed, rendering them invalid. |
290 base::WeakPtrFactory<GpuChannel> weak_factory_; | 288 base::WeakPtrFactory<GpuChannel> weak_factory_; |
291 | 289 |
292 DISALLOW_COPY_AND_ASSIGN(GpuChannel); | 290 DISALLOW_COPY_AND_ASSIGN(GpuChannel); |
293 }; | 291 }; |
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405 DISALLOW_COPY_AND_ASSIGN(GpuChannelMessage); | 403 DISALLOW_COPY_AND_ASSIGN(GpuChannelMessage); |
406 }; | 404 }; |
407 | 405 |
408 class GpuChannelMessageQueue | 406 class GpuChannelMessageQueue |
409 : public base::RefCountedThreadSafe<GpuChannelMessageQueue> { | 407 : public base::RefCountedThreadSafe<GpuChannelMessageQueue> { |
410 public: | 408 public: |
411 static scoped_refptr<GpuChannelMessageQueue> Create( | 409 static scoped_refptr<GpuChannelMessageQueue> Create( |
412 const base::WeakPtr<GpuChannel>& gpu_channel, | 410 const base::WeakPtr<GpuChannel>& gpu_channel, |
413 base::SingleThreadTaskRunner* task_runner); | 411 base::SingleThreadTaskRunner* task_runner); |
414 | 412 |
415 // Returns the global order number for the last processed IPC message. | 413 scoped_refptr<gpu::SyncPointClientState> GetSyncPointClientState(); |
| 414 |
| 415 // Returns the global order number for the last unprocessed IPC message. |
416 uint32_t GetUnprocessedOrderNum() const; | 416 uint32_t GetUnprocessedOrderNum() const; |
417 | 417 |
418 // Returns the global order number for the last unprocessed IPC message. | 418 // Returns the global order number for the last unprocessed IPC message. |
419 uint32_t processed_order_num() const { return processed_order_num_; } | 419 uint32_t GetProcessedOrderNum() const; |
420 | 420 |
421 bool HasQueuedMessages() const; | 421 bool HasQueuedMessages() const; |
422 | 422 |
423 base::TimeTicks GetNextMessageTimeTick() const; | 423 base::TimeTicks GetNextMessageTimeTick() const; |
424 | 424 |
425 GpuChannelMessage* GetNextMessage() const; | 425 GpuChannelMessage* GetNextMessage() const; |
426 | 426 |
| 427 void BeginMessageProcessing(const GpuChannelMessage* msg); |
| 428 |
427 // Should be called after a message returned by GetNextMessage is processed. | 429 // Should be called after a message returned by GetNextMessage is processed. |
428 // Returns true if there are more messages on the queue. | 430 // Returns true if there are more messages on the queue. |
429 bool MessageProcessed(); | 431 bool MessageProcessed(); |
430 | 432 |
431 void PushBackMessage(const IPC::Message& message); | 433 void PushBackMessage(gpu::SyncPointManager* sync_point_manager, |
| 434 const IPC::Message& message); |
432 | 435 |
433 bool GenerateSyncPointMessage(gpu::SyncPointManager* sync_point_manager, | 436 bool GenerateSyncPointMessage(gpu::SyncPointManager* sync_point_manager, |
434 const IPC::Message& message, | 437 const IPC::Message& message, |
435 bool retire_sync_point, | 438 bool retire_sync_point, |
436 uint32_t* sync_point_number); | 439 uint32_t* sync_point_number); |
437 | 440 |
438 void DeleteAndDisableMessages(GpuChannelManager* gpu_channel_manager); | 441 void DeleteAndDisableMessages(GpuChannelManager* gpu_channel_manager); |
439 | 442 |
440 private: | 443 private: |
441 friend class base::RefCountedThreadSafe<GpuChannelMessageQueue>; | 444 friend class base::RefCountedThreadSafe<GpuChannelMessageQueue>; |
442 | 445 |
443 GpuChannelMessageQueue(const base::WeakPtr<GpuChannel>& gpu_channel, | 446 GpuChannelMessageQueue(const base::WeakPtr<GpuChannel>& gpu_channel, |
444 base::SingleThreadTaskRunner* task_runner); | 447 base::SingleThreadTaskRunner* task_runner); |
445 ~GpuChannelMessageQueue(); | 448 ~GpuChannelMessageQueue(); |
446 | 449 |
447 void ScheduleHandleMessage(); | 450 void ScheduleHandleMessage(); |
448 | 451 |
449 void PushMessageHelper(scoped_ptr<GpuChannelMessage> msg); | 452 void PushMessageHelper(gpu::SyncPointManager* sync_point_manager, |
450 | 453 scoped_ptr<GpuChannelMessage> msg); |
451 // This number is only ever incremented/read on the IO thread. | |
452 static uint32_t global_order_counter_; | |
453 | 454 |
454 bool enabled_; | 455 bool enabled_; |
455 | 456 |
456 // Highest IPC order number seen, set when queued on the IO thread. | |
457 uint32_t unprocessed_order_num_; | |
458 // Both deques own the messages. | 457 // Both deques own the messages. |
459 std::deque<GpuChannelMessage*> channel_messages_; | 458 std::deque<GpuChannelMessage*> channel_messages_; |
460 | 459 |
461 // This lock protects enabled_, unprocessed_order_num_, and channel_messages_. | 460 // This lock protects enabled_ and channel_messages_. |
462 mutable base::Lock channel_messages_lock_; | 461 mutable base::Lock channel_messages_lock_; |
463 | 462 |
464 // Last finished IPC order number. Not protected by a lock as it's only | 463 // Keeps track of sync point related state such as message order numbers. |
465 // accessed on the main thread. | 464 scoped_refptr<gpu::SyncPointClientState> sync_point_client_state_; |
466 uint32_t processed_order_num_; | |
467 | 465 |
468 base::WeakPtr<GpuChannel> gpu_channel_; | 466 base::WeakPtr<GpuChannel> gpu_channel_; |
469 scoped_refptr<base::SingleThreadTaskRunner> task_runner_; | 467 scoped_refptr<base::SingleThreadTaskRunner> task_runner_; |
470 | 468 |
471 DISALLOW_COPY_AND_ASSIGN(GpuChannelMessageQueue); | 469 DISALLOW_COPY_AND_ASSIGN(GpuChannelMessageQueue); |
472 }; | 470 }; |
473 | 471 |
474 } // namespace content | 472 } // namespace content |
475 | 473 |
476 #endif // CONTENT_COMMON_GPU_GPU_CHANNEL_H_ | 474 #endif // CONTENT_COMMON_GPU_GPU_CHANNEL_H_ |
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